From: Dai Okamura okamura.dai@socionext.com
Commit 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC") missed to write the computed value to the SSCPLLCTRL2 register.
Fixes: 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC") Signed-off-by: Dai Okamura okamura.dai@socionext.com Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/mach-uniphier/clk/pll-base-ld20.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-uniphier/clk/pll-base-ld20.c b/arch/arm/mach-uniphier/clk/pll-base-ld20.c index 3aa42f8..45fdf0a 100644 --- a/arch/arm/mach-uniphier/clk/pll-base-ld20.c +++ b/arch/arm/mach-uniphier/clk/pll-base-ld20.c @@ -48,6 +48,7 @@ int uniphier_ld20_sscpll_init(unsigned long reg_base, unsigned int freq, tmp = readl(base + 4); tmp &= ~SC_PLLCTRL2_SSC_JK_MASK; tmp |= (41859 * freq / divn) & SC_PLLCTRL2_SSC_JK_MASK; + writel(tmp, base + 4);
udelay(50); }