GEC2410 Boot from NAND FLASH.
Signed-off-by: Hui.Tang zetalabs@gmail.com --- cpu/arm920t/start.S | 36 ++++++++++++++++++++++++++++++++++++ 1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index 114427a..d8b832a 100644 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -27,6 +27,10 @@ #include <common.h> #include <config.h>
+#if !defined(CONFIG_ENABLE_MMU) && !defined(CONFIG_SYS_PHY_UBOOT_BASE) +#define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE +#endif + /* ************************************************************************* * @@ -38,6 +42,7 @@
.globl _start _start: b start_code +#ifndef CONFIG_NAND_SPL ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -53,7 +58,13 @@ _data_abort: .word data_abort _not_used: .word not_used _irq: .word irq _fiq: .word fiq +_pad: .word 0x12345678 /* now 16*4=64 */ +#else + . = _start + 64 +#endif
+.global _end_vect +_end_vect: .balignl 16,0xdeadbeef
@@ -73,6 +84,14 @@ _fiq: .word fiq _TEXT_BASE: .word TEXT_BASE
+/* + * Below variable is very important because we use MMU in U-Boot. + * Without it, we cannot run code correctly before MMU is ON. + * by scsuh. + */ +_TEXT_PHY_BASE: + .word CONFIG_SYS_PHY_UBOOT_BASE + .globl _armboot_start _armboot_start: .word _start @@ -114,8 +133,10 @@ start_code: orr r0, r0, #0xd3 msr cpsr, r0
+#ifndef CONFIG_NAND_SPL bl coloured_LED_init bl red_LED_on +#endif
#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) /* @@ -176,6 +197,7 @@ copyex: bl cpu_init_crit #endif
+#ifndef CONFIG_NAND_SPL #ifndef CONFIG_SKIP_RELOCATE_UBOOT relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ @@ -194,9 +216,13 @@ copy_loop: cmp r0, r2 /* until source end addreee [r2] */ ble copy_loop #endif /* CONFIG_SKIP_RELOCATE_UBOOT */ +#endif /* CONFIG_NAND_SPL */
/* Set up the stack */ stack_setup: +#ifdef CONFIG_MEMORY_UPPER_CODE + ldr sp, =(CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE - 0xc) +#else ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ @@ -204,6 +230,7 @@ stack_setup: sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif sub sp, r0, #12 /* leave 3 words for abort-stack */ +#endif /* CONFIG_MEMORY_UPPER_CODE */
clear_bss: ldr r0, _bss_start /* find start of bss segment */ @@ -215,9 +242,14 @@ clbss_l:str r2, [r0] /* clear loop... */ cmp r0, r1 ble clbss_l
+#ifndef CONFIG_NAND_SPL ldr pc, _start_armboot
_start_armboot: .word start_armboot +#else + b nand_boot +/* .word nand_boot */ +#endif
/* @@ -234,6 +266,7 @@ _start_armboot: .word start_armboot
#ifndef CONFIG_SKIP_LOWLEVEL_INIT cpu_init_crit: +#ifndef CONFIG_NAND_SPL /* * flush v4 I/D caches */ @@ -251,6 +284,7 @@ cpu_init_crit: orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache mcr p15, 0, r0, c1, c0, 0
+#endif /* CONFIG_NAND_SPL */ /* * before relocating, we have to setup RAM timing * because memory timing is board-dependend, you will @@ -264,6 +298,7 @@ cpu_init_crit: mov pc, lr #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+#ifndef CONFIG_NAND_SPL /* ************************************************************************* * @@ -434,3 +469,4 @@ fiq: bl do_fiq
#endif +#endif /* CONFIG_NAND_SPL */