On 23/02/16 15:01, Stuart Yoder wrote:
-----Original Message----- From: Minghuan Lian Sent: Tuesday, February 23, 2016 3:57 AM To: Stuart Yoder stuart.yoder@nxp.com; u-boot@lists.denx.de Cc: york sun york.sun@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Mingkai Hu mingkai.hu@nxp.com; Yang-Leo Li leoyang.li@nxp.com; marc.zyngier@arm.com; Stuart Yoder stuart.yoder@nxp.com Subject: RE: [PATCH 7/7] pci/layerscape: set LUT and msi-map for discovered PCI devices
Hi Stuart,
-----Original Message----- From: Stuart Yoder [mailto:stuart.yoder@nxp.com] Sent: Monday, February 22, 2016 11:26 PM To: u-boot@lists.denx.de Cc: york sun york.sun@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Mingkai Hu mingkai.hu@nxp.com; Minghuan Lian minghuan.lian@nxp.com; Yang-Leo Li leoyang.li@nxp.com; marc.zyngier@arm.com; Stuart Yoder stuart.yoder@nxp.com Subject: [PATCH 7/7] pci/layerscape: set LUT and msi-map for discovered PCI devices
From: Stuart Yoder stuart.yoder@nxp.com
for all PCI devices discovered in a system: -allocate a LUT (look-up-table) entry in that PCI controller -allocate a stream ID for the device -program and enable a LUT entry (maps PCI requester id to stream ID) -set the msi-map property on the controller reflecting the LUT mapping
basic bus scanning loop/logic was taken from drivers/pci/pci.c pci_hose_scan_bus().
Signed-off-by: Stuart Yoder stuart.yoder@nxp.com
drivers/pci/pcie_layerscape.c | 68 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+)
diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index dfafaf2..eaac9e1 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -569,6 +569,70 @@ static void fdt_pcie_set_msi_map_entry(void *blob, struct ls_pcie *pcie, fdt_appendprop_u32(blob, nodeoffset, "msi-map", 1); }
+static void fdt_fixup_pcie(void *blob) +{
- unsigned int found_multi = 0;
- unsigned char header_type;
- int index;
- u32 streamid;
- pci_dev_t dev;
- int bus;
- unsigned short id;
- struct pci_controller *hose;
- struct ls_pcie *pcie;
- int i;
- for (i = 0, hose = pci_get_hose_head(); hose; hose = hose->next, i++) {
pcie = hose->priv_data;for (bus = hose->first_busno; bus <= hose->last_busno; bus++) {for (dev = PCI_BDF(bus, 0, 0);dev < PCI_BDF(bus, PCI_MAX_PCI_DEVICES - 1,PCI_MAX_PCI_FUNCTIONS - 1);dev += PCI_BDF(0, 0, 1)) {/* skip the host bridge */if (dev == PCI_BDF(0, 0, 0))continue;[Lian Minghuan-B31939] PCIe controller also needs a stream ID. It may request a MSI for AER PME hotplug service.
Is this a theoretical problem, or does the ls2080a actually support hotplug and assert an MSI? Mingkai said that a hotplug interrupt could be an INTx interrupt. The fdt_fixup_pcie() in this patch is specifically for Layerscape SoCs and I think it makes sense to implement what hardware actually supports.
For sure, the ls2085 reports such a capability, and the kernel assigns a pair of MSIs to it.
97: 0 0 0 0 0 0 0 0 ITS-MSI 0 Edge PCIe PME 98: 0 0 0 0 0 0 0 0 ITS-MSI 1 Edge aerdrv
I haven't tried to exercise it though.
M.