This driver is not enabled anywhere, remove it. Also remove definitions of symbols only used in this driver, on platforms that did not enable it.
Signed-off-by: Tom Rini trini@konsulko.com --- drivers/pci/Makefile | 1 - drivers/pci/pci_sh4.c | 82 -------------------------------- include/configs/x86-chromebook.h | 12 ----- 3 files changed, 95 deletions(-) delete mode 100644 drivers/pci/pci_sh4.c
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index 04f623652f09..cfcd6fd6c52f 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -20,7 +20,6 @@ obj-$(CONFIG_PCIE_IMX) += pcie_imx.o obj-$(CONFIG_PCI_MVEBU) += pci_mvebu.o obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o obj-$(CONFIG_PCI_RCAR_GEN3) += pci-rcar-gen3.o -obj-$(CONFIG_SH4_PCI) += pci_sh4.o obj-$(CONFIG_SH7751_PCI) +=pci_sh7751.o obj-$(CONFIG_SH7780_PCI) +=pci_sh7780.o obj-$(CONFIG_PCI_TEGRA) += pci_tegra.o diff --git a/drivers/pci/pci_sh4.c b/drivers/pci/pci_sh4.c deleted file mode 100644 index aac9be055e2c..000000000000 --- a/drivers/pci/pci_sh4.c +++ /dev/null @@ -1,82 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * SH4 PCI Controller (PCIC) for U-Boot. - * (C) Dustin McIntire (dustin@sensoria.com) - * (C) 2007,2008 Nobuhiro Iwamatsu iwamatsu@nigauri.org - * (C) 2008 Yusuke Goda goda.yusuke@renesas.com - * - * u-boot/arch/sh/cpu/sh4/pci-sh4.c - */ - -#include <common.h> -#include <linux/delay.h> - -#include <asm/processor.h> -#include <asm/io.h> -#include <asm/pci.h> -#include <pci.h> - -int pci_sh4_init(struct pci_controller *hose) -{ - hose->first_busno = 0; - hose->region_count = 0; - hose->last_busno = 0xff; - - /* PCI memory space */ - pci_set_region(hose->regions + 0, - CONFIG_PCI_MEM_BUS, - CONFIG_PCI_MEM_PHYS, - CONFIG_PCI_MEM_SIZE, - PCI_REGION_MEM); - hose->region_count++; - - /* PCI IO space */ - pci_set_region(hose->regions + 1, - CONFIG_PCI_IO_BUS, - CONFIG_PCI_IO_PHYS, - CONFIG_PCI_IO_SIZE, - PCI_REGION_IO); - hose->region_count++; - -#if defined(CONFIG_PCI_SYS_BUS) - /* PCI System Memory space */ - pci_set_region(hose->regions + 2, - CONFIG_PCI_SYS_BUS, - CONFIG_PCI_SYS_PHYS, - CONFIG_PCI_SYS_SIZE, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); - hose->region_count++; -#endif - - udelay(1000); - - pci_set_ops(hose, - pci_hose_read_config_byte_via_dword, - pci_hose_read_config_word_via_dword, - pci_sh4_read_config_dword, - pci_hose_write_config_byte_via_dword, - pci_hose_write_config_word_via_dword, - pci_sh4_write_config_dword); - - pci_register_hose(hose); - - udelay(1000); - -#ifdef CONFIG_PCI_SCAN_SHOW - printf("PCI: Bus Dev VenId DevId Class Int\n"); -#endif - hose->last_busno = pci_hose_scan(hose); - return 0; -} - -int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev) -{ - return 0; -} - -#ifdef CONFIG_PCI_SCAN_SHOW -int pci_print_dev(struct pci_controller *hose, pci_dev_t dev) -{ - return 1; -} -#endif /* CONFIG_PCI_SCAN_SHOW */ diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index b45d2bbd6266..4109af7d8511 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -12,18 +12,6 @@ #define CONFIG_X86_REFCODE_ADDR 0xffea0000 #define CONFIG_X86_REFCODE_RUN_ADDR 0
-#define CONFIG_PCI_MEM_BUS 0xe0000000 -#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS -#define CONFIG_PCI_MEM_SIZE 0x10000000 - -#define CONFIG_PCI_PREF_BUS 0xd0000000 -#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS -#define CONFIG_PCI_PREF_SIZE 0x10000000 - -#define CONFIG_PCI_IO_BUS 0x1000 -#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS -#define CONFIG_PCI_IO_SIZE 0xefff - #define VIDEO_IO_OFFSET 0 #define CONFIG_X86EMU_RAW_IO