
On 2023/3/14 08:38, Jonas Karlman wrote:
The rate and error value is not returned for aux16m clocks, fix this.
Fixes: 7a474df74023 ("clk: rockchip: Add rk3588 clk support") Signed-off-by: Jonas Karlman jonas@kwiboo.se
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
drivers/clk/rockchip/clk_rk3588.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c index 5271d9434831..a7df553e8750 100644 --- a/drivers/clk/rockchip/clk_rk3588.c +++ b/drivers/clk/rockchip/clk_rk3588.c @@ -1558,7 +1558,7 @@ static ulong rk3588_clk_get_rate(struct clk *clk) #ifndef CONFIG_SPL_BUILD case CLK_AUX16M_0: case CLK_AUX16M_1:
rk3588_aux16m_get_clk(priv, clk->id);
break; case ACLK_VOP_ROOT: case ACLK_VOP:rate = rk3588_aux16m_get_clk(priv, clk->id);
@@ -1707,7 +1707,7 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate) #ifndef CONFIG_SPL_BUILD case CLK_AUX16M_0: case CLK_AUX16M_1:
rk3588_aux16m_set_clk(priv, clk->id, rate);
break; case ACLK_VOP_ROOT: case ACLK_VOP:ret = rk3588_aux16m_set_clk(priv, clk->id, rate);