This code intends to read the SDRAM controller base address registers but is instead reading the CPU window base address registers. Also, remove "ddr" from the name of struct orion5x_addr_decode_registers, since it also applies to other decode registers.
Signed-off-by: Michael Spang mspang@csclub.uwaterloo.ca --- arch/arm/cpu/arm926ejs/orion5x/dram.c | 6 +++--- arch/arm/include/asm/arch-orion5x/cpu.h | 2 +- arch/arm/include/asm/arch-orion5x/orion5x.h | 1 + 3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c b/arch/arm/cpu/arm926ejs/orion5x/dram.c index b749282..b95d537 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/dram.c +++ b/arch/arm/cpu/arm926ejs/orion5x/dram.c @@ -36,9 +36,9 @@ DECLARE_GLOBAL_DATA_PTR; */ u32 orion5x_sdram_bar(enum memory_bank bank) { - struct orion5x_ddr_addr_decode_registers *winregs = - (struct orion5x_ddr_addr_decode_registers *) - ORION5X_CPU_WIN_BASE; + struct orion5x_addr_decode_registers *winregs = + (struct orion5x_addr_decode_registers *) + ORION5X_SDRAM_CTRL_BASE;
u32 result = 0; u32 enable = 0x01 & winregs[bank].size; diff --git a/arch/arm/include/asm/arch-orion5x/cpu.h b/arch/arm/include/asm/arch-orion5x/cpu.h index c84efaf..d43abbf 100644 --- a/arch/arm/include/asm/arch-orion5x/cpu.h +++ b/arch/arm/include/asm/arch-orion5x/cpu.h @@ -243,7 +243,7 @@ struct orion5x_cpu_registers { * DDR SDRAM Controller Address Decode Registers * Source: 88F5182 User Manual, Appendix A, section A.5.1 */ -struct orion5x_ddr_addr_decode_registers { +struct orion5x_addr_decode_registers { u32 base; u32 size; }; diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h b/arch/arm/include/asm/arch-orion5x/orion5x.h index 96c2c57..95bb952 100644 --- a/arch/arm/include/asm/arch-orion5x/orion5x.h +++ b/arch/arm/include/asm/arch-orion5x/orion5x.h @@ -42,6 +42,7 @@ #define ORION5X_REGISTER(x) (ORION5X_REGS_PHY_BASE + x)
/* Documented registers */ +#define ORION5X_SDRAM_CTRL_BASE (ORION5X_REGISTER(0x01500)) #define ORION5X_TWSI_BASE (ORION5X_REGISTER(0x11000)) #define ORION5X_UART0_BASE (ORION5X_REGISTER(0x12000)) #define ORION5X_UART1_BASE (ORION5X_REGISTER(0x12100))