PHYCTL register offset at 0x10 need to be cleared before it's written. Ported from below Linux patch. d699c1d phy: sun4i-usb: change PHYCTL register clearing code
Signed-off-by: Jagan Teki jagan@amarulasolutions.com Signed-off-by: Jun Nie jun.nie@linaro.org --- arch/arm/mach-sunxi/usb_phy.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c index 9a0a1b9..32ee0d4 100644 --- a/arch/arm/mach-sunxi/usb_phy.c +++ b/arch/arm/mach-sunxi/usb_phy.c @@ -126,7 +126,8 @@ __maybe_unused static void usb_phy_write(struct sunxi_usb_phy *phy, int addr, int j = 0, usbc_bit = 0; void *dest = (void *)SUNXI_USB0_BASE + SUNXI_USB_CSR;
-#ifdef CONFIG_MACH_SUN8I_A33 +#if defined(CONFIG_MACH_SUN8I_A33) || defined(CONFIG_MACH_SUNXI_H3_H5) || \ + defined(CONFIG_MACH_SUN50I) /* CSR needs to be explicitly initialized to 0 on A33 */ writel(0, dest); #endif