On 2010/07/20 9:58 AM, Stefan Roese wrote:
OK, so the width is definitely 8 bit and not 16 bit:
static struct physmap_flash_data dns323_nor_flash_data = { .width = 1, ...
But the base address is listed here as 0xf4000000:
#define DNS323_NOR_BOOT_BASE 0xf4000000
Are you sure you got this right? Nevertheless, now we know for sure, that the NOR chip is connected as an 8bit device and the chip is operated in byte mode. So all tests from the U-Boot prompt should be done with ".b" extension.
Hi Stefan,
I found the following configuration snippet for OpenOCD for the DNS323 at http://wiki.dns323.info/hardware:jtag:
# driver addr size chip_width bus_width options flash bank cfi 0xff800000 0x800000 1 2 0
It seems that the key here is that the bus_width is set to 2, even though the chip_width is only 1.
Also, the flash address is still 0xff800000, even though the kernel has it as 0xf4000000. I guess this is because only a certain number of address lines are actually connected through to the flash chip, and so the chip can appear in multiple places?
Does that make any more sense? Is it possible that the CFI code in U-Boot doesn't consider the case when bus_width == 2?
Regards,
Rogan