Hi Otavio,
On 16/06/2014 02:46, Otavio Salvador wrote:
The i.MX6SL has a different base address for the controller. This patch adapts the driver to support the different base address for this case.
Signed-off-by: Otavio Salvador otavio@ossystems.com.br
drivers/usb/host/ehci-mx6.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index c0a557b..5ba1c5e 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -53,6 +53,12 @@ #define UCMD_RUN_STOP (1 << 0) /* controller run/stop */ #define UCMD_RESET (1 << 1) /* controller reset */
+#ifdef CONFIG_MX6SL +#define USB_BASE_ADDR USBO2H_USB_BASE_ADDR +#else +#define USB_BASE_ADDR USBOH3_USB_BASE_ADDR +#endif
What about using the is_cpu_type() function, recently added together with SPL support ? I think we have reached, thank to Tim's patches, the goal to have a single image for different Freescale's mx6 variations. It is pity to go back and decide at compile time which SOC is running.
static const unsigned phy_bases[] = { USB_PHY0_BASE_ADDR, USB_PHY1_BASE_ADDR, @@ -174,7 +180,7 @@ struct usbnc_regs {
static void usb_oc_config(int index) {
- struct usbnc_regs *usbnc = (struct usbnc_regs *)(USBOH3_USB_BASE_ADDR +
- struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET); void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl[index]); u32 val;
@@ -207,7 +213,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { enum usb_init_type type;
- struct usb_ehci *ehci = (struct usb_ehci *)(USBOH3_USB_BASE_ADDR +
struct usb_ehci *ehci = (struct usb_ehci *)(USB_BASE_ADDR + (0x200 * index));
if (index > 3)
Best regards, Stefano Babic