K0: Original Montavista kernel K1: Kernel without D-cache Adapted for 4x60(SDH 2/6 ch) K2: Kernel with D-cache enabled for 4160 (SDH 6 ch)
Difference between K1 & K2: 1. D-cache (~/kernel2.4.17/arch/ppc/kernel/head.S) here only one line difference.
2. Page table & cache buffer allocation (~/kernel2.4.17/arch/ppc/8260_io/comproc.c) I can send the difference only 4 lines only setting the buffer arrays.
Target: 4160 (compat SDH unit) Abatron: Jtag Debugger
fw4x60.cfg: old config file for Abatron fw8270.cfg: new config file for Abatron
The tests tried using U-BOOT:
1. Loaded K1 onto target independent of Abatron
2. Loaded K2 onto target with Abatron fw8270.cfg
ran busy looptest for K1 & K2 result: K2 40 times faster
3. Tried to load K2 to target without Abatron result: Failed
Conclusions & comments:
There are significant differences between fw4x60.cfg & fw8270.cfg. These differences need to be incorporated in the new Kernel (OR I am not sure about it but may be into the Boot-loader).
Core Initialization file in kernel: ~/kernel2.4.17/arch/ppc/kernel/head.S
Speculated changes: ~/kernel2.4.17/arch/ppc/8260_io/comproc.c It was speculated that the cached buffers triggered the exception. And commproc.c was modified to make those buffers uncacheable. But that made things worse: invalidate_dcache_range() and flush_tlb_page() cause another exception to occur (not identified).
U-boot initialization files: ~/u-boot/cpu/mpc8260 start.S, cpu_init.c
Both these files in u-boot are meant to initialize the core & MMU.
If the config changes need to go into the kernel I am not sure if it is the head.S file.
If the config changes need to go into the boot loader I am not sure while the kernel opperates if there will be any unpredictable behaviour.
Irrespective of where the changes go, the main task is to analize each difference between fw4x60.cfg & fw8270.cfg and develope the initialization code.
If any one has another plan of action please let me know, I appreciate guidance.
Attached are the two config files.
Sincerely, Om Vadlapatla
PS:- All I need is to load the new kernel with out a glitch coz I can do it with the Abatron pluged in.
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; ----------------------------------------------------------------------------- ; Abatron bdiGDB configuration file for the FW4X60 platform ; single board computer running MontaVista Linux. ; ; The physical memory map is as follows: ; 0x00000000 - 0x0FFFFFFF 256MB 60x SDRAM on CS1 and CS2 ; 0x30000000 - 0x33FFFFFF 64MB local SDRAM on CS5 ; 0x40000000 - 0x41FFFFFF 32MB FPGA on CS6 ; 0x50000000 - 0x50FFFFFF 16MB RTC on CS7 ; 0x80000000 - 0x80007FFF 32KB IDE on CS9 ; 0xF0000000 - 0xF001FFFF 128KB MPC8260 internal memory ; 0xFFE00000 - 0xFFFFFFFF 2MB Flash on CS0 ; ----------------------------------------------------------------------------- ; [INIT] WM32 0x000101A8 0xF0000000 ; IMMR (relocate internal memory) WREG MSR 0x00000000 ; clear MSR ;WM32 0xF0010000 0x0A200000 ; SIUMCR WM32 0xF0010004 0xFFFFFFC3 ; SYPCR (no watchdog) WM32 0xF0010C80 0x00000001 ; SCCR WM32 0xF0010024 0x80808000 ; BCR WM8 0xF0010028 0x26 ; PPC_ACR: WM32 0xF0010040 0x00004000 ; TESCR1: WM32 0xF0010048 0x00004000 ; L_TESCR1: ; ; ; Memory controller WM32 0xF0010104 0xFF000C54 ; OR0 WM32 0xF0010100 0xFF001001 ; BR0 ;WM32 0xF0010100 0xFFE01001 ; BR0 ;WM32 0xF0010104 0xFFE00844 ; OR0 WM32 0xF0010134 0xFE000008 ; OR6 FPGA WM32 0xF0010130 0x40001001 ; BR6 WM32 0xF001013C 0xFF000C0C ; OR7 RTC WM32 0xF0010138 0x50001001 ; BR7 WM32 0xF001014C 0xFFFF8008 ; OR9 IDE WM32 0xF0010148 0x80001001 ; BR9 ; ; ; Initialize the SDRAM on the 60x bus. ; WM32 0xF001010C 0xF8002B00 ; OR1 WM32 0xF0010108 0x00000049 ; BR1 WM32 0xF0010114 0xF8002B00 ; OR2 WM32 0xF0010110 0x08000049 ; BR2 WM16 0xF0010184 0x4000 ; MPTPR WM8 0xF001019C 0x7 ; PSRT WM32 0xF0010190 0xAAAE245E ; PSDMR: Precharge all banks WM8 0x00000000 0xFF ; Access SDRAM WM32 0xF0010190 0x8AAE245E ; PSDMR: CBR Refresh WM8 0x00000000 0xFF ; Access SDRAM WM8 0x00000000 0xFF ; Access SDRAM WM8 0x00000000 0xFF ; Access SDRAM WM8 0x00000000 0xFF ; Access SDRAM WM8 0x00000000 0xFF ; Access SDRAM WM8 0x00000000 0xFF ; Access SDRAM WM8 0x00000000 0xFF ; Access SDRAM WM8 0x00000000 0xFF ; Access SDRAM WM32 0xF0010190 0x9AAE245E ; PSDMR: Mode Register Write WM8 0x00000000 0xFF ; Access SDRAM WM32 0xF0010190 0xC2AE245E ; PSDMR: Normal operation and refresh enable ; ; Initialize the SDRAM on the local bus. ; WM32 0xF001012C 0xFC002D00 ; OR5 WM32 0xF0010128 0x30001861 ; BR5 WM8 0xF00101A4 0x7 ; LSRT WM32 0xF0010194 0xAA6A2556 ; LSDMR: Precharge all banks WM8 0x30000000 0xFF ; Access SDRAM WM32 0xF0010194 0x8A6A2556 ; LSDMR: CBR Refresh WM8 0x30000000 0xFF ; Access SDRAM WM8 0x30000000 0xFF ; Access SDRAM WM8 0x30000000 0xFF ; Access SDRAM WM8 0x30000000 0xFF ; Access SDRAM WM8 0x30000000 0xFF ; Access SDRAM WM8 0x30000000 0xFF ; Access SDRAM WM8 0x30000000 0xFF ; Access SDRAM WM8 0x30000000 0xFF ; Access SDRAM WM32 0xF0010194 0x9A6A2556 ; LSDMR: Mode Register Write WM8 0x30000000 0xFF ; Access SDRAM WM32 0xF0010194 0xC26A2556 ; LSDMR: Normal operation and refresh enable ; WM16 0x50800206 0x2000 ; Disable flash write protection ; ; [TARGET] CPUTYPE 8270 ; 603EV, 750, 8240, 8260, 750CX, or 7400 BDIMODE AGENT ; LOADONLY or AGENT STARTUP RESET ; RESET, STOP, or RUN JTAGCLOCK 3 ; 0=16.6MHz, 1=8.3MHz, 2=5.5MHz, 3=4.1MHz BOOTADDR 0xFFF00100 ; 0xFFF00100 or 0x00000100 WORKSPACE 0x00000000 ; use SDRAM for 256 byte workspace BREAKMODE HARD ; SOFT or HARD VECTOR CATCH ; catch unhandled exceptions DCACHE NOFLUSH ; FLUSH or NOFLUSH POWERUP 3000 WAKEUP 3000 MMU XLAT 0xC0000000 ; kernel virtual base address PTBASE 0x000000F0 ; address of page table pointer array SIO 7 9600 ; ; ; [FLASH] CHIPTYPE AM29BX16 ; AM29F, AM29BX8, AM29BX16, I28BX8, I28BX16, ; AT49, AT49X8, AT49X16, STRATAX8, STRATAX16 CHIPSIZE 0x200000 ; size of one flash chip in bytes BUSWIDTH 16 ; flash bus width (8, 16, 32, or 64) WORKSPACE 0xF0000000 ; use MPC8270 internal RAM for 2KB workspace ERASE 0xFFE00000 CHIP ; erase entire Flash SIMM ; ; ; [HOST] IP 172.30.10.7 ; IP address of tftp server FILE vmlinuz-est-sbc8260 FORMAT IMAGE 0x0 ; SREC, BIN, AOUT, ELF, IMAGE, or ROM LOAD MANUAL ; MANUAL or AUTO DEBUGPORT 2001 ; TCP port number for GDB PROMPT FW4X60> ; Telnet prompt string DUMP dump.bin ; default filename for DUMP command ; ; ; [REGS] DMM1 0xF0000000 FILE abatron/reg8260.def