Number of Qualcomm ARMv7 SoC-s did not use PSCI but rather used PSHOLD (Qualcomm Power Supply Hold Reset) bit to trigger reset or poweroff.
Qualcomm IPQ40XX is one of them, so provide a simple sysreset driver based on the upstream Linux one, it is DT compatible as well.
Signed-off-by: Robert Marko robert.marko@sartura.hr --- drivers/sysreset/Kconfig | 6 +++ drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_msm-pshold.c | 56 ++++++++++++++++++++++++++ 3 files changed, 63 insertions(+) create mode 100644 drivers/sysreset/sysreset_msm-pshold.c
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index 49c0787b26..30ff9e576d 100644 --- a/drivers/sysreset/Kconfig +++ b/drivers/sysreset/Kconfig @@ -235,6 +235,12 @@ config SYSRESET_RAA215300 help Add support for the system reboot via the Renesas RAA215300 PMIC.
+config SYSRESET_MSM_PSHOLD + bool "Support sysreset for Qualcomm SoCs via PSHOLD" + depends on ARCH_IPQ40XX + help + Add support for the system reboot on Qualcomm SoCs via PSHOLD. + endif
endmenu diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile index e0e732205d..da61dca8e2 100644 --- a/drivers/sysreset/Makefile +++ b/drivers/sysreset/Makefile @@ -28,4 +28,5 @@ obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o obj-$(CONFIG_$(SPL_TPL_)SYSRESET_AT91) += sysreset_at91.o obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o obj-$(CONFIG_SYSRESET_RAA215300) += sysreset_raa215300.o +obj-$(CONFIG_SYSRESET_MSM_PSHOLD) += sysreset_msm-pshold.o obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o diff --git a/drivers/sysreset/sysreset_msm-pshold.c b/drivers/sysreset/sysreset_msm-pshold.c new file mode 100644 index 0000000000..d25a412954 --- /dev/null +++ b/drivers/sysreset/sysreset_msm-pshold.c @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm PSHOLD reset driver + * + * Copyright (c) 2024 Sartura Ltd. + * + * Author: Robert Marko robert.marko@sartura.hr + * Based on the Linux msm-poweroff driver. + * + */ + +#include <common.h> +#include <dm.h> +#include <sysreset.h> +#include <asm/io.h> +#include <linux/delay.h> + +struct msm_pshold_priv { + phys_addr_t base; +}; + +static int msm_pshold_request(struct udevice *dev, enum sysreset_t type) +{ + struct msm_pshold_priv *priv = dev_get_priv(dev); + + writel(0, priv->base); + mdelay(10000); + + return 0; +} + +static struct sysreset_ops msm_pshold_ops = { + .request = msm_pshold_request, +}; + +static int msm_pshold_probe(struct udevice *dev) +{ + struct msm_pshold_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr(dev); + return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0; +} + +static const struct udevice_id msm_pshold_ids[] = { + { .compatible = "qcom,pshold", }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(msm_pshold) = { + .name = "msm_pshold", + .id = UCLASS_SYSRESET, + .of_match = msm_pshold_ids, + .probe = msm_pshold_probe, + .priv_auto = sizeof(struct msm_pshold_priv), + .ops = &msm_pshold_ops, +};