Homogenize prg_p naming (the reference manuals are not always self-consistent for that). Add missing registers. Fix some registers.
Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de Cc: Wolfgang Denk wd@denx.de --- This patch supersedes http://patchwork.ozlabs.org/patch/177242/ . Changes for v2: - Rebase against latest master.
.../arch/arm/include/asm/arch-mx25/imx-regs.h | 8 ++++++-- .../arch/arm/include/asm/arch-mx27/imx-regs.h | 2 +- .../arch/arm/include/asm/arch-mx31/imx-regs.h | 9 +++++++-- .../arch/arm/include/asm/arch-mx35/imx-regs.h | 7 ++++++- .../arch/arm/include/asm/arch-mx5/imx-regs.h | 6 +++++- 5 files changed, 25 insertions(+), 7 deletions(-)
diff --git u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx25/imx-regs.h u-boot-178d0cc/arch/arm/include/asm/arch-mx25/imx-regs.h index 53aafe3..1b71168 100644 --- u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx25/imx-regs.h +++ u-boot-178d0cc/arch/arm/include/asm/arch-mx25/imx-regs.h @@ -117,8 +117,12 @@ struct iim_regs { u32 iim_sdat; u32 iim_prev; u32 iim_srev; - u32 iim_prog_p; - u32 res1[0x1f5]; + u32 iim_prg_p; + u32 iim_scs0; + u32 iim_scs1; + u32 iim_scs2; + u32 iim_scs3; + u32 res1[0x1f1]; struct fuse_bank { u32 fuse_regs[0x20]; u32 fuse_rsvd[0xe0]; diff --git u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx27/imx-regs.h u-boot-178d0cc/arch/arm/include/asm/arch-mx27/imx-regs.h index 2f6c823..aee058f 100644 --- u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx27/imx-regs.h +++ u-boot-178d0cc/arch/arm/include/asm/arch-mx27/imx-regs.h @@ -176,7 +176,7 @@ struct iim_regs { u32 iim_sdat; u32 iim_prev; u32 iim_srev; - u32 iim_prog_p; + u32 iim_prg_p; u32 iim_scs0; u32 iim_scs1; u32 iim_scs2; diff --git u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx31/imx-regs.h u-boot-178d0cc/arch/arm/include/asm/arch-mx31/imx-regs.h index 8fd3d08..e799f37 100644 --- u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx31/imx-regs.h +++ u-boot-178d0cc/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -79,7 +79,7 @@ struct wdog_regs { u16 wrsr; /* Reset Status */ };
-/* IIM Control Registers */ +/* IIM control registers */ struct iim_regs { u32 iim_stat; u32 iim_statm; @@ -91,11 +91,16 @@ struct iim_regs { u32 iim_sdat; u32 iim_prev; u32 iim_srev; - u32 iim_prog_p; + u32 iim_prg_p; u32 iim_scs0; u32 iim_scs1; u32 iim_scs2; u32 iim_scs3; + u32 res[0x1f1]; + struct fuse_bank { + u32 fuse_regs[0x20]; + u32 fuse_rsvd[0xe0]; + } bank[3]; };
struct iomuxc_regs { diff --git u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx35/imx-regs.h u-boot-178d0cc/arch/arm/include/asm/arch-mx35/imx-regs.h index 7b09809..6161784 100644 --- u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx35/imx-regs.h +++ u-boot-178d0cc/arch/arm/include/asm/arch-mx35/imx-regs.h @@ -258,11 +258,16 @@ struct iim_regs { u32 iim_sdat; u32 iim_prev; u32 iim_srev; - u32 iim_prog_p; + u32 iim_prg_p; u32 iim_scs0; u32 iim_scs1; u32 iim_scs2; u32 iim_scs3; + u32 res1[0x1f1]; + struct fuse_bank { + u32 fuse_regs[0x20]; + u32 fuse_rsvd[0xe0]; + } bank[3]; };
/* General Purpose Timer (GPT) registers */ diff --git u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx5/imx-regs.h u-boot-178d0cc/arch/arm/include/asm/arch-mx5/imx-regs.h index 1d060fd..8f0a7ec 100644 --- u-boot-178d0cc.orig/arch/arm/include/asm/arch-mx5/imx-regs.h +++ u-boot-178d0cc/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -508,7 +508,7 @@ struct iim_regs { u32 sdat; u32 prev; u32 srev; - u32 preg_p; + u32 prg_p; u32 scs0; u32 scs1; u32 scs2; @@ -517,7 +517,11 @@ struct iim_regs { struct fuse_bank { u32 fuse_regs[0x20]; u32 fuse_rsvd[0xe0]; +#if defined(CONFIG_MX51) } bank[4]; +#elif defined(CONFIG_MX53) + } bank[5]; +#endif };
struct fuse_bank0_regs {