Hi,
On Mon, Nov 10, 2014 at 01:47:48PM -0500, Tom Rini wrote:
On Thu, Nov 06, 2014 at 08:44:27AM -0600, Felipe Balbi wrote:
BeagleBoard-X15 is the next generation Open Source Hardware BeagleBoard based on TI's AM5728 SoC featuring dual core 1.5GHZ A15 processor. The platform features 2GB DDR3L (w/dual 32bit busses), eSATA, 3 USB3.0 ports, integrated HDMI (1920x108@60), separate LCD port, video In port, 4GB eMMC, uSD, Analog audio in/out, dual 1G Ethernet.
For more information, refer to: http://www.elinux.org/Beagleboard:BeagleBoard-X15
Signed-off-by: Felipe Balbi balbi@ti.com Signed-off-by: Nishanth Menon nm@ti.com
[snip]
+static const struct emif_regs beagle_x15_ddr3_532mhz_emif_regs = {
- .sdram_config_init = 0x61851B32, /* dont know what to do about this */
- .sdram_config = 0x61851B32,
- .sdram_config2 = 0x00000000,
- .ref_ctrl = 0x00001035,
- .sdram_tim1 = 0xCEEF266B,
- .sdram_tim2 = 0x328F7FDA,
- .sdram_tim3 = 0x027F88A8,
- .read_idle_ctrl = 0x00050001, /* not sure where in gel file */
- .zq_config = 0x0007190B,
- .temp_alert_config = 0x00000000,
- .emif_ddr_phy_ctlr_1_init = 0x0E24400A, /* not sure what to do about this */
- .emif_ddr_phy_ctlr_1 = 0x0E24400A, /* based on non hw level enabled */
- .emif_ddr_ext_phy_ctrl_1 = 0x10040100, /* not sure wherein gel file */
- .emif_ddr_ext_phy_ctrl_2 = 0x00740074,
- .emif_ddr_ext_phy_ctrl_3 = 0x00780078,
- .emif_ddr_ext_phy_ctrl_4 = 0x007c007c,
- .emif_ddr_ext_phy_ctrl_5 = 0x007b007b,
- .emif_rd_wr_lvl_rmp_win = 0x00000000,
- .emif_rd_wr_lvl_rmp_ctl = 0x00000000, /* based on non hw level enabled */
- .emif_rd_wr_lvl_ctl = 0x00000000, /* not sure where based in gel file */
- .emif_rd_wr_exec_thresh = 0x00000305
Lets either get the timing info right or comment that we expect to need to tweak these values again later based on production HW or something.
alright, I'll fix that. Apparently we have final timings now which I got over the weekend, I'll try those out.
+static const u32 beagle_x15_ddr3_ext_phy_ctrl_const_regs[] = {
- 0x00800080, // 6
- 0x00360036, // 7
- 0x00340034, // 8
- 0x00360036, // 9
- 0x00350035, // 10
- 0x00350035, // 11
- 0x01ff01ff, // 12
// isn't allowed and what're you counting? :)
heh, forgot to drop those. Now dropped.
[snip]
+#define CONFIG_SYS_SDRAM_BASE 0x80000000
Shouldn't be needed, should be set by a common header already.
dropped.