Hi Simon,
On 06/29 09:07, Andrew Bradford wrote:
On 06/25 11:55, Simon Glass wrote:
The SPI flash starts off protected on baytrail. The code which is supposed to fix this is broken. This series fixes that, enables the SPI environment and adds documentation.
Also when driver model is enabled for PCI some bugs appear. This series fixes those and enables driver model for PCI on minnowboard MAX.
Changes in v2:
- Continue to use writew for ICH7
- Use ich_read/write() for BIOS protection update
- Fix typos in README.x86
- Rename the ops and ids arrays for consistency
- Drop the coreboot PCI driver which is no-longer needed
- Only limit the PCI system memory region on x86 machines
Simon Glass (7): dm: spi: Correct status register access width dm: spi: Correct BIOS protection logic for ICH9 dm: spi: Enable environment for minnowmax x86: Add ROM image description for minnowmax x86: pci: Tidy up the generic x86 PCI driver dm: x86: minnowmax: Move PCI to use driver model dm: x86: baytrail: Correct PCI region 3 when driver model is used
arch/x86/cpu/baytrail/Makefile | 1 - arch/x86/cpu/baytrail/pci.c | 46 --------------------------------------- arch/x86/cpu/coreboot/pci.c | 21 ------------------ arch/x86/cpu/cpu.c | 1 + arch/x86/dts/minnowmax.dts | 10 +++++++++ common/board_f.c | 4 ++++ configs/minnowmax_defconfig | 1 + doc/README.x86 | 17 +++++++++++++++ drivers/pci/pci-uclass.c | 8 +++++-- drivers/pci/pci_x86.c | 13 ++++++----- drivers/spi/ich.c | 15 ++++++++----- include/asm-generic/global_data.h | 1 + include/configs/minnowmax.h | 6 ++--- 13 files changed, 60 insertions(+), 84 deletions(-) delete mode 100644 arch/x86/cpu/baytrail/pci.c
Tested-by: Andrew Bradford andrew.bradford@kodakalaris.com
I don't actually have a Minnowmax board or any E3800 board that has the type of SPI flash that's on Minnowmax, but when I try to do an `env save` it just seems to hang unless I interrupt it with ^C (output below). Even waiting 15 minutes for the env write to complete doesn't help (I don't currently have a logic analyzer hooked up, sorry).
I'm running the minnowmax_defconfig but adjusted only to handle that I have a SODIMM installed so telling FSP to set memory_down to 0 (hence 1 GB of memory). My board is close enough to Minnow Max to be useful (patches to support it hopefully coming real soon now).
But the PCI bits seem to be working for me! :)
<snip>
I've enabled debug output and with this patchset from you I believe I'm able to erase and read the SPI flash fine, I just cannot write to it. That I seem to be able to do erases but not writes confuses me.
This is tested on an E3845 based board that's fairly similar to Minnowmax but uses a different SPI flash. I know my SPI flash is OK, I'm able to program it with a Dediprog SF100 programmer without issue.
A debug output enabled log is below. It seems that my writes are resulting in the FCERR bit being set in the Software Sequencing Flash Status Register, indicating that either I'm violating a protection policy or I'm writing to a programmed cycle register when a programming access is already in progress. I do not believe I'm writing to any registers during a programming operation, so it seems I'm violating some kind of protection but all of the protections I see in the data sheet disallow writes *AND* erases, so I'm a bit confused.
drivers/spi/ich.c and the sequence of events to do writes all seems correct to me as I understand the Bay Trail datasheet.
Any pointers on what I could look at to try to better understand why FCERR is getting set during writes?
Thanks, Andrew
Below is example of doing probe, erase, write, and then test. In both the write and test cases, writes fail due to FCERR being set:
=> sf probe uclass_find_device_by_seq: 0 0 - 0 0 - found spi_find_chip_select: plat=3b845528, cs=0 uclass_find_device_by_seq: 0 0 - 0 0 - found spi_get_bus_and_cs: Binding new device 'spi_flash@0:0', busnum=0, cs=0, driver=spi_flash_std Bound device spi_flash@0:0 to spi uclass_find_device_by_seq: 0 -1 uclass_find_device_by_seq: 0 0 - -1 -1 - not found spi_flash_std_probe: slave=3b847b68, cs=0 ich_spi_set_mode: mode=3 ICH SPI: Saved 1 bytes ICH SPI: Using 1 bytes read 0080 from 0090 wrote 0c to 0090 wrote 9f to 0098 read 0001 from 0096 wrote 0000 to 0096 read 0000 from 0091 read 0000 from 0094 wrote 00000000 to 0008 wrote 4402 to 0091 read 0084 from 0090 wrote 0004 to 0090 wrote 0000 to 0094 SF: Got idcodes 00000000: ef 60 17 00 00 .`... read 0080 from 0090 wrote 0c to 0090 wrote 06 to 0098 read 0000 from 0096 wrote 0001 to 0096 wrote 0006 to 0094 ICH SPI: Saved 1 bytes ICH SPI: Using 1 bytes read 0080 from 0090 wrote 0c to 0090 wrote 01 to 0098 read 0001 from 0096 wrote 0001 to 0096 ICH SPI: Moving to data, 1 bytes read 4400 from 0091 read 0006 from 0094 wrote 00000000 to 0008 wrote 4006 to 0091 read 0481 from 0090 read 0481 from 0090 read 0484 from 0090 wrote 0004 to 0090 wrote 0000 to 0094 ICH SPI: Saved 1 bytes ICH SPI: Using 1 bytes read 0080 from 0090 wrote 0c to 0090 wrote 05 to 0098 read 0001 from 0096 wrote 0000 to 0096 read 4000 from 0091 read 0000 from 0094 wrote 00000000 to 0008 wrote 4002 to 0091 read 0084 from 0090 wrote 0004 to 0090 wrote 0000 to 0094 fdtdec_get_addr_size: memory-map: addr=ff800000, size=00800000 SF: Detected W25Q64DW with page size 256 Bytes, erase size 4 KiB, total 8 MiB, mapped at ff800000 ich_spi_set_mode: mode=3 spi_get_bus_and_cs: bus=3b845448, slave=3b847b68
=> sf erase 7fe000 1000 SF: erase 20 7f e0 0 (7fe000) read 0080 from 0090 wrote 0c to 0090 wrote 06 to 0098 read 0000 from 0096 wrote 0001 to 0096 wrote 0006 to 0094 read 0080 from 0090 wrote 0c to 0090 wrote 20 to 0098 read 0001 from 0096 wrote 0001 to 0096 read 4000 from 0091 read 0006 from 0094 wrote 00000000 to 0008 wrote 4206 to 0091 read 0481 from 0090 read 0481 from 0090 read 0484 from 0090 wrote 0004 to 0090 wrote 0000 to 0094 ICH SPI: Saved 1 bytes ICH SPI: Using 1 bytes read 0080 from 0090 wrote 0c to 0090 wrote 05 to 0098 read 0001 from 0096 wrote 0000 to 0096 read 4200 from 0091 read 0000 from 0094 wrote 00000000 to 0008 wrote 4002 to 0091 read 0084 from 0090 wrote 0004 to 0090 wrote 0000 to 0094 SF: 4096 bytes @ 0x7fe000 Erased: OK
=> sf write $loadaddr 7fe000 1000 SF: 0x01000000 => cmd = { 0x02 0x7fe000 } chunk_len = 64 read 0080 from 0090 wrote 0c to 0090 wrote 06 to 0098 read 0000 from 0096 wrote 0001 to 0096 wrote 0006 to 0094 ICH SPI: Saved 4 bytes ICH SPI: Using 4 bytes read 0080 from 0090 wrote 0c to 0090 wrote 02 to 0098 read 0001 from 0096 wrote 0003 to 0096 ICH SPI: Moving to data, 64 bytes read 4000 from 0091 read 0006 from 0094 wrote 007fe000 to 0008 wrote 7f06 to 0091 read 048c from 0090 wrote 000c to 0090 ICH SPI: Data transaction error 48c SF: Failed to transfer 64 bytes of data: -5 SF: write cmd failed SF: write failed SF: 4096 bytes @ 0x7fe000 Written: ERROR -5 Command failed, result=1
=> sf test 7fe000 1000 SPI flash test: SF: erase 20 7f e0 0 (7fe000) read 0080 from 0090 wrote 0c to 0090 wrote 06 to 0098 read 0000 from 0096 wrote 0001 to 0096 wrote 0006 to 0094 read 0080 from 0090 wrote 0c to 0090 wrote 20 to 0098 read 0001 from 0096 wrote 0001 to 0096 read 4000 from 0091 read 0006 from 0094 wrote 00000000 to 0008 wrote 4206 to 0091 read 0481 from 0090 read 0481 from 0090 read 0481 from 0090 read 0481 from 0090 read 0484 from 0090 wrote 0004 to 0090 wrote 0000 to 0094 ICH SPI: Saved 1 bytes ICH SPI: Using 1 bytes read 0080 from 0090 wrote 0c to 0090 wrote 05 to 0098 read 0001 from 0096 wrote 0000 to 0096 read 4200 from 0091 read 0000 from 0094 wrote 00000000 to 0008 wrote 4002 to 0091 read 0084 from 0090 wrote 0004 to 0090 wrote 0000 to 0094 0 erase: 501 ticks, 7 KiB/s 0.056 Mbps ICH SPI: Using 1 bytes read 0080 from 0090 wrote 0c to 0090 wrote 05 to 0098 read 0000 from 0096 wrote 0001 to 0096 read 4000 from 0091 read 0000 from 0094 wrote 0002 to 0091 read 0084 from 0090 wrote 0004 to 0090 ICH SPI: Using 1 bytes read 0080 from 0090 wrote 0c to 0090 wrote 05 to 0098 read 0001 from 0096 wrote 0001 to 0096 read 0000 from 0091 read 0000 from 0094 wrote 0002 to 0091 read 0084 from 0090 wrote 0004 to 0090 1 check: 333 ticks, 12 KiB/s 0.096 Mbps SF: 0x3b84afc0 => cmd = { 0x02 0x7fe000 } chunk_len = 64 read 0080 from 0090 wrote 0c to 0090 wrote 06 to 0098 read 0001 from 0096 wrote 0001 to 0096 wrote 0006 to 0094 ICH SPI: Saved 4 bytes ICH SPI: Using 4 bytes read 0080 from 0090 wrote 0c to 0090 wrote 02 to 0098 read 0001 from 0096 wrote 0003 to 0096 ICH SPI: Moving to data, 64 bytes read 0000 from 0091 read 0006 from 0094 wrote 007fe000 to 0008 wrote 7f06 to 0091 read 048c from 0090 wrote 000c to 0090 ICH SPI: Data transaction error 48c SF: Failed to transfer 64 bytes of data: -5 SF: write cmd failed SF: write failed Write failed Test failed Command failed, result=1