There are a few memory functions for both the emif4 (AM3517) and sdrc (OMAP35/DM37) code that can be defined as static, because those functions are not used externally. Make them static and clean up some of the corresponding headers.
Signed-off-by: Adam Ford aford173@gmail.com
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h index 7adc134a75..569779c55e 100644 --- a/arch/arm/include/asm/arch-omap3/mem.h +++ b/arch/arm/include/asm/arch-omap3/mem.h @@ -480,7 +480,6 @@ void mem_init(void); u32 is_mem_sdr(void); u32 mem_ok(u32 cs);
-u32 get_sdr_cs_size(u32); u32 get_sdr_cs_offset(u32);
#endif /* __ASSEMBLY__ */ diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h index e7078a32db..3e6335c5fa 100644 --- a/arch/arm/include/asm/arch-omap3/sys_proto.h +++ b/arch/arm/include/asm/arch-omap3/sys_proto.h @@ -33,11 +33,8 @@ struct board_sdrc_timings { void prcm_init(void); void per_clocks_enable(void); void ehci_clocks_enable(void); - void memif_init(void); void sdrc_init(void); -void do_sdrc_init(u32, u32); - void get_board_mem_timings(struct board_sdrc_timings *timings); int identify_nand_chip(int *mfr, int *id); void emif4_init(void); @@ -60,12 +57,10 @@ void invalidate_dcache(u32); u32 wait_on_value(u32, u32, void *, u32); void cancel_out(u32 *num, u32 *den, u32 den_limit); void sdelay(unsigned long); -void make_cs1_contiguous(void); int omap_nand_switch_ecc(uint32_t, uint32_t); void power_init_r(void); void do_omap3_emu_romcode_call(u32 service_id, u32 parameters); void omap3_set_aux_cr_secure(u32 acr); u32 warm_reset(void); - void save_omap_boot_params(void); #endif diff --git a/arch/arm/mach-omap2/omap3/emif4.c b/arch/arm/mach-omap2/omap3/emif4.c index df6e9ce1d6..d7d779819b 100644 --- a/arch/arm/mach-omap2/omap3/emif4.c +++ b/arch/arm/mach-omap2/omap3/emif4.c @@ -35,7 +35,7 @@ u32 is_mem_sdr(void) * get_sdr_cs_size - * - Get size of chip select 0/1 */ -u32 get_sdr_cs_size(u32 cs) +static u32 get_sdr_cs_size(u32 cs) { u32 size = 0;
diff --git a/arch/arm/mach-omap2/omap3/sdrc.c b/arch/arm/mach-omap2/omap3/sdrc.c index 4d85b1dee9..07f534a60b 100644 --- a/arch/arm/mach-omap2/omap3/sdrc.c +++ b/arch/arm/mach-omap2/omap3/sdrc.c @@ -44,13 +44,28 @@ u32 is_mem_sdr(void) return 0; }
+/* + * get_sdr_cs_size - + * - Get size of chip select 0/1 + */ +static u32 get_sdr_cs_size(u32 cs) +{ + u32 size; + + /* get ram size field */ + size = readl(&sdrc_base->cs[cs].mcfg) >> 8; + size &= 0x3FF; /* remove unwanted bits */ + size <<= 21; /* multiply by 2 MiB to find size in MB */ + return size; +} + /* * make_cs1_contiguous - * - When we have CS1 populated we want to have it mapped after cs0 to allow * command line mem=xyz use all memory with out discontinuous support * compiled in. We could do it in the ATAG, but there really is two banks... */ -void make_cs1_contiguous(void) +static void make_cs1_contiguous(void) { u32 size, a_add_low, a_add_high;
@@ -62,22 +77,6 @@ void make_cs1_contiguous(void)
}
- -/* - * get_sdr_cs_size - - * - Get size of chip select 0/1 - */ -u32 get_sdr_cs_size(u32 cs) -{ - u32 size; - - /* get ram size field */ - size = readl(&sdrc_base->cs[cs].mcfg) >> 8; - size &= 0x3FF; /* remove unwanted bits */ - size <<= 21; /* multiply by 2 MiB to find size in MB */ - return size; -} - /* * get_sdr_cs_offset - * - Get offset of cs from cs0 start @@ -128,7 +127,7 @@ static void write_sdrc_timings(u32 cs, struct sdrc_actim *sdrc_actim_base, * true and a possible 2nd time depending on memory configuration from * stack+global context. */ -void do_sdrc_init(u32 cs, u32 early) +static void do_sdrc_init(u32 cs, u32 early) { struct sdrc_actim *sdrc_actim_base0, *sdrc_actim_base1; struct board_sdrc_timings timings;