Hi!
I have a custom imx6q board with NAND сhip (MT29F2G08ABAEA).
I've already compiled a few u-boot versions from different vendors and repositories including Freescale, Boundary and Denx mainline. I have to mention that in all repositories I use nitrogen6x board as reference because it has similar design and very convenient set of files to fill in DDR3 registers. I need to modify DDR settings because DDR3 calibration tools shows different values.
So what I achieved so far:
1) Freescale uboot-imx->imx_v2013.04_3.10.17_1.0.0_ga
boots fine, NAND detected, NAND erase hangs:
U-Boot 2013.04-04989-g6bb0820-dirty (Apr 06 2016 - 09:46:52)
CPU: Freescale i.MX6Q rev1.5 at 792 MHz
CPU: Temperature 37 C, calibration data: 0x5824ec69
Reset cause: POR
Board: Nitrogen6X
I2C: ready
DRAM: 1 GiB
NAND: 256 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
MMC: no card present
MMC init failed
Using default environment
No panel detected: default to HDMI
unsupported panel HDMI
In: serial
Out: serial
Err: serial
Net: Phy not found
using phy at 4
PHY reset timed out
FEC [PRIME]
Warning: failed to set MAC address
Boot from USB for mfgtools
Use default environment for mfgtools
Run bootcmd_mfg: run mfgtool_args;bootm ${loadaddr} ${initrd_addr} ${fdt_addr};
Hit any key to stop autoboot: 0
Wrong Image Format for bootm command
ERROR: can't get kernel image!
U-Boot > nand info
Device 0: nand0, sector size 128 KiB
Page size 2048 b
OOB size 64 b
Erase size 131072 b
U-Boot > nand erase.chip
NAND erase.chip: device 0 whole chip
<<<here nothing happens and the board hangs
2) Denx u-boot mainline, branch v2016.03
git clone https://github.com/u-boot/u-boot
cd u-boot/
git checkout v2016.03 -b tmp
Results: boots fine, NAND detected, NAND erase hangs with lots of DMA errors:
U-Boot 2016.03-dirty (Apr 06 2016 - 10:07:27 +0300)
CPU: Freescale i.MX6Q rev1.5 at 792 MHz
Reset cause: POR
Board: Nitrogen6X
I2C: ready
DRAM: 1 GiB
NAND: 256 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
SF: Unsupported flash IDs: manuf 00, jedec 0000, ext_jedec 0000
*** Warning - spi_flash_probe() failed, using default environment
No panel detected: default to HDMI
Display: HDMI (1024x768)
In: serial
Out: serial
Err: serial
Net: Board Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot: 0
=> nand info
Device 0: nand0, sector size 128 KiB
Page size 2048 b
OOB size 64 b
Erase size 131072 b
subpagesize 2048 b
options 0x 200
bbt options 0x 8000
=> nand erase.chip
NAND erase.chip: device 0 whole chip
MXS NAND: DMA read error
MXS NAND: Error sending command
MXS NAND: Error sending command
MXS NAND: DMA read error
MXS NAND: Error sending command
MXS NAND: Error sending command
MXS NAND: DMA read error
Here is the patch: diff --git a/board/boundary/nitrogen6x/clocks.cfg b/board/boundary/nitrogen6x/clocks.cfg index 8bddb91..52e3c8d 100644 --- a/board/boundary/nitrogen6x/clocks.cfg +++ b/board/boundary/nitrogen6x/clocks.cfg @@ -19,8 +19,8 @@ DATA 4, CCM_CCGR0, 0x00C03F3F DATA 4, CCM_CCGR1, 0x0030FC03 DATA 4, CCM_CCGR2, 0x0FFFC000 DATA 4, CCM_CCGR3, 0x3FF00000 -DATA 4, CCM_CCGR4, 0x00FFF300 -DATA 4, CCM_CCGR5, 0x0F0000C3 +DATA 4, CCM_CCGR4, 0xFFFFF300 +DATA 4, CCM_CCGR5, 0x0F0000F3 DATA 4, CCM_CCGR6, 0x000003FF
/* enable AXI cache for VDOA/VPU/IPU */ diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index 104d71f..ddbbf8a 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -65,6 +65,11 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ PAD_CTL_HYS | PAD_CTL_SRE_SLOW)
+#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) +#define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \ + PAD_CTL_SRE_FAST) +#define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1) + #define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm)
int dram_init(void) @@ -75,8 +80,8 @@ int dram_init(void) }
static iomux_v3_cfg_t const uart1_pads[] = { - MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), };
static iomux_v3_cfg_t const uart2_pads[] = { @@ -358,6 +363,42 @@ static void setup_spi(void) } #endif
+#ifdef CONFIG_NAND_MXS +static iomux_v3_cfg_t gpmi_pads[] = { + MX6_PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(GPMI_PAD_CTRL2), + MX6_PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(GPMI_PAD_CTRL2), + MX6_PAD_NANDF_WP_B__NAND_WP_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2), + MX6_PAD_NANDF_RB0__NAND_READY_B | MUX_PAD_CTRL(GPMI_PAD_CTRL0), + MX6_PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2), + MX6_PAD_SD4_CMD__NAND_RE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2), + MX6_PAD_SD4_CLK__NAND_WE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2), + MX6_PAD_NANDF_D0__NAND_DATA00 | MUX_PAD_CTRL(GPMI_PAD_CTRL2), + MX6_PAD_NANDF_D1__NAND_DATA01 | MUX_PAD_CTRL(GPMI_PAD_CTRL2), + MX6_PAD_NANDF_D2__NAND_DATA02 | MUX_PAD_CTRL(GPMI_PAD_CTRL2), + MX6_PAD_NANDF_D3__NAND_DATA03 | MUX_PAD_CTRL(GPMI_PAD_CTRL2), + MX6_PAD_NANDF_D4__NAND_DATA04 | MUX_PAD_CTRL(GPMI_PAD_CTRL2), + MX6_PAD_NANDF_D5__NAND_DATA05 | MUX_PAD_CTRL(GPMI_PAD_CTRL2), + MX6_PAD_NANDF_D6__NAND_DATA06 | MUX_PAD_CTRL(GPMI_PAD_CTRL2), + MX6_PAD_NANDF_D7__NAND_DATA07 | MUX_PAD_CTRL(GPMI_PAD_CTRL2), + MX6_PAD_SD4_DAT0__NAND_DQS | MUX_PAD_CTRL(GPMI_PAD_CTRL1), +}; + +static void setup_gpmi_nand(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + /* config gpmi nand iomux */ + imx_iomux_v3_setup_multiple_pads(gpmi_pads, ARRAY_SIZE(gpmi_pads)); + + setup_gpmi_io_clk((MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) | + MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) | + MXC_CCM_CS2CDR_ENFC_CLK_SEL(3))); + + /* enable apbh clock gating */ + setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); +} +#endif + int board_phy_config(struct phy_device *phydev) { /* min rx data delay */ @@ -865,6 +906,9 @@ int board_early_init_f(void) imx_iomux_v3_setup_multiple_pads(wl12xx_pads, ARRAY_SIZE(wl12xx_pads)); imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads)); setup_buttons(); +#ifdef CONFIG_NAND_MXS + setup_gpmi_nand(); +#endif
#if defined(CONFIG_VIDEO_IPUV3) setup_display(); diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 3416ce3..d7bb74d 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -27,7 +27,7 @@ #define CONFIG_NETCONSOLE
#define CONFIG_MXC_UART -#define CONFIG_MXC_UART_BASE UART2_BASE +#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_CMD_SF #ifdef CONFIG_CMD_SF @@ -347,4 +347,20 @@ #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR #define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
+/* NAND flash command */ +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NAND_TRIMFFS + +/* NAND stuff */ +#define CONFIG_NAND_MXS +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_ONFI_DETECTION + +/* DMA stuff, needed for GPMI/MXS NAND support */ +#define CONFIG_APBH_DMA +#define CONFIG_APBH_DMA_BURST +#define CONFIG_APBH_DMA_BURST8 + #endif /* __CONFIG_H */