Move this symbol to Kconfig, and preserve the current behavior. The help text here comes from where the relevant code is implemented and it is quite likely at this point in time we could either disable this option or at least make it configurable.
Signed-off-by: Tom Rini trini@konsulko.com --- arch/powerpc/cpu/mpc85xx/Kconfig | 13 +++++++++++++ arch/powerpc/include/asm/config_mpc85xx.h | 6 ------ 2 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 36519613a2cc..03373bf86926 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1,6 +1,19 @@ menu "mpc85xx CPU" depends on MPC85xx
+config PPC_SPINTABLE_COMPATIBLE + depends on MP + def_bool y + help + To comply with ePAPR 1.1, the spin table has been moved to + cache-enabled memory. Old OS may not work with this change. A patch + is waiting to be accepted for Linux kernel. Other OS needs similar + fix to spin table. For OSes with old spin table code, we can enable + this temporary fix by setting environmental variable + "spin_table_compat". For new OSes, set "spin_table_compat=no". After + Linux is fixed, we can remove this macro and related code. For now, + it is enabled by default. + config SYS_CPU default "mpc85xx"
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index e80599106066..246bcb9fe498 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -8,12 +8,6 @@
/* SoC specific defines for Freescale MPC85xx (PQ3) and QorIQ processors */
-/* - * This macro should be removed when we no longer care about backwards - * compatibility with older operating systems. - */ -#define CONFIG_PPC_SPINTABLE_COMPATIBLE - #include <fsl_ddrc_version.h>
#if defined(CONFIG_ARCH_MPC8548)