Matthias Fuchs wrote:
Hi,
we had some discussions about the FPGA subsystem some days (and also a couple of months) before on this list. I have also some local improvements for the FPGA subsystem.
[snip]
Matthias
Hi Matthias,
[massive snip]
diff --git a/common/spartan3.c b/common/spartan3.c index c0f2b05..4fe3e89 100644 --- a/common/spartan3.c +++ b/common/spartan3.c @@ -30,7 +30,7 @@ #include <common.h> /* core U-Boot definitions */ #include <spartan3.h> /* Spartan-II device family */
-#if (CONFIG_FPGA & (CFG_XILINX | CFG_SPARTAN3)) +#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_SPARTAN3)
/* Define FPGA_DEBUG to get debug printf's */ #ifdef FPGA_DEBUG @@ -446,7 +446,7 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) int ret_val = FPGA_FAIL; /* assume the worst */ Xilinx_Spartan3_Slave_Serial_fns *fn = desc->iface_fns; int i;
- char val;
- unsigned char val;
Trivia: This change should not be necessary since you fixed the conditional (below) to do a bit-wise & 0x80 rather than a signed compare that has portability and aesthetic problems.
PRINTF ("%s: start with interface functions @ 0x%p\n", __FUNCTION__, fn); @@ -514,6 +514,7 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) puts ("** CRC error during FPGA load.\n"); return (FPGA_FAIL); }
val = data [bytecount ++]; i = 8; do {@@ -521,7 +522,7 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) (*fn->clk) (FALSE, TRUE, cookie); CONFIG_FPGA_DELAY (); /* Write data */
(*fn->wr) ((val < 0), TRUE, cookie);
(*fn->wr) ((val & 0x80), TRUE, cookie);
Thank you, that makes my aesthetics radar much happier! :-) Now it should be immaterial whether val is signed or unsigned.
Painting the bike shed blue, gvb
[snip]
Ref: http://www.freebsd.org/doc/en_US.ISO8859-1/books/faq/misc.html#BIKESHED-PAINTING