Hi Wolfgang,
On Monday 16 May 2011 01:36 AM, Wolfgang Denk wrote:
Dear Aneesh V,
In message1305472900-4004-18-git-send-email-aneesh@ti.com you wrote:
Identify SDRAM devices connected to EMIF automatically: LPDDR2 devices have some Mode Registers that provide details about the device such as the type, density, bus width etc. EMIF has the capability to read these registers. If there are not devices connected to a given chip-select reading mode registers will return junk values. After reading as many such registers as possible and matching with expected ranges of values the driver can identify if there is a device connected to the respective CS. If we identify that a device is connected the values read give us complete details about the device.
This along with the base AC timings specified by JESD209-2 allows us to do a complete automatic initialization of SDRAM that works on all boards.
Please note that the default AC timings specified by JESD209-2 will be safe for all devices but not necessarily optimal. However, for the Elpida devices used on Panda and SDP the default timings are both safe and optimal.
Signed-off-by: Aneesh Vaneesh@ti.com
arch/arm/cpu/armv7/omap4/emif.c | 177 +++++++++++++++++++++++++++++- arch/arm/cpu/armv7/omap4/sdram_elpida.c | 9 +- include/configs/omap4_sdp4430.h | 1 + 3 files changed, 176 insertions(+), 11 deletions(-)
How much of this is OMAP4 specific, and how much can be reused onother SoCs as well?
LPDDR2 provides registers. But OMAP4 EMIF controller provides the means to read them. In that sense it is closely tied to EMIF.
best regards, Aneesh