
3 Aug
2016
3 Aug
'16
6:32 p.m.
On Tue, Aug 2, 2016 at 4:07 AM, Stefan Agner stefan@agner.ch wrote:
From: Stefan Agner stefan.agner@toradex.com
The page table is maintained by the CPU, hence it is safe to always align cache flush to a whole cache line size. This allows to use mmu_page_table_flush for a single page table, e.g. when configure only small regions through mmu_set_region_dcache_behaviour.
Signed-off-by: Stefan Agner stefan.agner@toradex.com
Tested-by: Fabio Estevam fabio.estevam@nxp.com