Signed-off-by: Stefano Babic sbabic@denx.de --- arch/arm/include/asm/arch-omap3/dss.h | 23 ++++++++++++++++--- drivers/video/omap3_dss.c | 40 ++++++++++++++++++++++++++++++++- 2 files changed, 59 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-omap3/dss.h b/arch/arm/include/asm/arch-omap3/dss.h index 4c56e5e..911cc9a 100644 --- a/arch/arm/include/asm/arch-omap3/dss.h +++ b/arch/arm/include/asm/arch-omap3/dss.h @@ -60,6 +60,17 @@ struct dispc_regs { u32 global_alpha; /* 0x74 */ u32 size_dig; /* 0x78 */ u32 size_lcd; /* 0x7C */ + u32 gfx_base[2]; + u32 gfx_position; /* 0x88 */ + u32 gfx_size; /* 0x8C */ + u32 reserved_3[4]; /* 0x90 */ + u32 gfx_attributes; /* 0xA0 */ + u32 gfx_fifo_threshold; /* 0xA4 */ + u32 gfx_fifo_size_status; /* 0xA8 */ + u32 gfx_row_inc; /* 0xAC */ + u32 gfx_pixel_inc; /* 0xB0 */ + u32 gfx_window_skip; /* 0xB4 */ + u32 gfx_table_ba; /* 0xB8 */ };
/* VENC Registers */ @@ -120,6 +131,7 @@ struct venc_regs {
/* Few Register Offsets */ #define FRAME_MODE_SHIFT 1 +#define FUNC_GATED_SHIFT 9 #define TFTSTN_SHIFT 3 #define DATALINES_SHIFT 8
@@ -132,13 +144,16 @@ struct venc_regs { #define GP_OUT1 (1 << 16)
#define DISPC_ENABLE (LCD_ENABLE | \ - DIG_ENABLE | \ GO_LCD | \ - GO_DIG | \ GP_OUT0| \ GP_OUT1)
-/* Configure VENC DSS Params */ +#define DISPC_PCK_FREE_ENABLE (1 << 27) + +/* Register DSS_CONTROL */ +#define DISPC_CLK_SWITCH (1 << 0) +#define DSI_CLK_SWITCH (1 << 1) +#define VENC_CLOCK_MODE (1 << 2) #define VENC_CLK_ENABLE (1 << 3) #define DAC_DEMEN (1 << 4) #define DAC_POWERDN (1 << 5) @@ -148,6 +163,7 @@ struct venc_regs { DAC_DEMEN | \ DAC_POWERDN | \ VENC_OUT_SEL) + /* * Panel Configuration */ @@ -170,5 +186,6 @@ void omap3_dss_venc_config(const struct venc_regs *venc_cfg, u32 height, u32 width); void omap3_dss_panel_config(const struct panel_config *panel_cfg); void omap3_dss_enable(void); +void omap3_dss_setfb(void *addr);
#endif /* DSS_H */ diff --git a/drivers/video/omap3_dss.c b/drivers/video/omap3_dss.c index b322cc3..6e5849a 100644 --- a/drivers/video/omap3_dss.c +++ b/drivers/video/omap3_dss.c @@ -28,6 +28,8 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/dss.h> +#include <asm/arch/clocks.h> +#include <asm/arch/clocks_omap3.h>
/* * Configure VENC for a given Mode (NTSC / PAL) @@ -105,16 +107,43 @@ void omap3_dss_venc_config(const struct venc_regs *venc_cfg, void omap3_dss_panel_config(const struct panel_config *panel_cfg) { struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE; + struct dss_regs *dss = (struct dss_regs *) OMAP3_DSS_BASE;
writel(panel_cfg->timing_h, &dispc->timing_h); writel(panel_cfg->timing_v, &dispc->timing_v); writel(panel_cfg->pol_freq, &dispc->pol_freq); writel(panel_cfg->divisor, &dispc->divisor); writel(panel_cfg->lcd_size, &dispc->size_lcd); - writel((panel_cfg->load_mode << FRAME_MODE_SHIFT), &dispc->config); + writel((panel_cfg->load_mode << FRAME_MODE_SHIFT) | + (1 << FUNC_GATED_SHIFT), + &dispc->config); writel(((panel_cfg->panel_type << TFTSTN_SHIFT) | (panel_cfg->data_lines << DATALINES_SHIFT)), &dispc->control); writel(panel_cfg->panel_color, &dispc->default_color0); + + writel(panel_cfg->lcd_size, &dispc->gfx_size); + writel(0x91, &dispc->gfx_attributes); + writel(0x01, &dispc->gfx_row_inc); + writel(0x01, &dispc->gfx_pixel_inc); + writel(0x00, &dispc->gfx_window_skip); + + writel(VENC_CLK_ENABLE | DAC_DEMEN, + &dss->control); + +} + +void omap3_dss_clock_enable(int enable) +{ + struct prcm *prcm_base = (struct prcm *)PRCM_BASE; + + if (enable) { + setbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON); + setbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON); + } else { + clrbits_le32(&prcm_base->fclken_dss, FCK_DSS_ON); + clrbits_le32(&prcm_base->iclken_dss, ICK_DSS_ON); + } + }
/* @@ -129,3 +158,12 @@ void omap3_dss_enable(void) l |= DISPC_ENABLE; writel(l, &dispc->control); } + +void omap3_dss_setfb(void *addr) +{ + struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE; + + writel((u32)addr, &dispc->gfx_base[0]); + writel((u32)addr, &dispc->gfx_base[1]); + +}