SPL linker has fix location of bootpg and reset vector with respect to text base. It is not necessary to have fixed locations.
Avoid such hardcoding.
Signed-off-by: Prabhakar Kushwaha prabhakar@freescale.com --- Changes for v2: Sending as it is Changes for v3: Sending as it is Changes for v4: Sending as it is
arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index acaa093..4fad68b 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -66,11 +66,16 @@ SECTIONS } :text = 0xffff #else #if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */ - .bootpg ADDR(.text) + 0x1000 : +#ifndef BOOT_PAGE_OFFSET +#define BOOT_PAGE_OFFSET 0x1000 +#endif + .bootpg ADDR(.text) + BOOT_PAGE_OFFSET : { arch/powerpc/cpu/mpc85xx/start.o (.bootpg) } +#ifndef RESET_VECTOR_OFFSET #define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */ +#endif #elif defined(CONFIG_FSL_ELBC) #define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */ #else