Re: [PATCH 1/2] arm64: dts: rockchip: Sync DT from linux-next

On 7/17/23 18:42, Jagan Teki wrote:

Sync the linux-next from below commit, commit <1642bf66e270> ("arm64: dts: rockchip: add USB2 to rk3588s-rock5a")

Also rops the duplicate usb nodes from rk3588s-u-boot.dtsi

Signed-off-by: Jagan Teki jagan@edgeble.ai

arch/arm/dts/rk3588-edgeble-neu6a.dtsi | 1 - arch/arm/dts/rk3588-edgeble-neu6b-io.dts | 66 +++ arch/arm/dts/rk3588-edgeble-neu6b.dtsi | 359 ++++++++++- arch/arm/dts/rk3588-evb1-v10.dts | 720 ++++++++++++++++++++++- arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 13 - arch/arm/dts/rk3588-rock-5b.dts | 578 +++++++++++++++++- arch/arm/dts/rk3588.dtsi | 112 ++++ arch/arm/dts/rk3588s-u-boot.dtsi | 119 ---- arch/arm/dts/rk3588s.dtsi | 499 +++++++++++++++- include/dt-bindings/ata/ahci.h | 20 + 10 files changed, 2346 insertions(+), 141 deletions(-) create mode 100644 include/dt-bindings/ata/ahci.h

[...]

}; diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index c703e41802..f8c10227b0 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -13,103 +13,12 @@ status = "okay"; };

• usb_host0_ehci: usb@fc800000 {

• compatible = "generic-ehci";
  

• reg = <0x0 0xfc800000 0x0 0x40000>;
  

• interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH 0>;
  

• clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>;
  

• clock-names = "usbhost", "arbiter";
  

• power-domains = <&power RK3588_PD_USB>;
  

• status = "disabled";
  

• };

No, this has to stay, the new nodes in kernel break usb2 on rk3588 platforms in U-boot. In u-boot, the PHY is not a clock provider. Hence the breakage. Only when the PHY becomes a clock provider you can remove these nodes here.

Check below the difference which I highlighted:

• usb_host0_ohci: usb@fc840000 {

• compatible = "generic-ohci";
  

• reg = <0x0 0xfc840000 0x0 0x40000>;
  

• interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 0>;
  

• clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>;
  

• clock-names = "usbhost", "arbiter";
  

• power-domains = <&power RK3588_PD_USB>;
  

• status = "disabled";
  

• };

• usb_host1_ehci: usb@fc880000 {

• compatible = "generic-ehci";
  

• reg = <0x0 0xfc880000 0x0 0x40000>;
  

• interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 0>;
  

• clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>;
  

• clock-names = "usbhost", "arbiter";
  

• power-domains = <&power RK3588_PD_USB>;
  

• status = "disabled";
  

• };

• usb_host1_ohci: usb@fc8c0000 {

• compatible = "generic-ohci";
  

• reg = <0x0 0xfc8c0000 0x0 0x40000>;
  

• interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 0>;
  

• clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>;
  

• clock-names = "usbhost", "arbiter";
  

• power-domains = <&power RK3588_PD_USB>;
  

• status = "disabled";
  

• };

• pmu1_grf: syscon@fd58a000 { bootph-all; compatible = "rockchip,rk3588-pmu1-grf", "syscon"; reg = <0x0 0xfd58a000 0x0 0x2000>; };

• pipe_phy0_grf: syscon@fd5bc000 {

• compatible = "rockchip,pipe-phy-grf", "syscon";
  

• reg = <0x0 0xfd5bc000 0x0 0x100>;
  

• };

• usb2phy2_grf: syscon@fd5d8000 {

• compatible = "rockchip,rk3588-usb2phy-grf", "syscon",
  

• 	     "simple-mfd";
  

• reg = <0x0 0xfd5d8000 0x0 0x4000>;
  

• #address-cells = <1>;
  

• #size-cells = <1>;
  

• u2phy2: usb2-phy@8000 {
  

• 	compatible = "rockchip,rk3588-usb2phy";
  

• 	reg = <0x8000 0x10>;
  

• 	interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH 0>;
  

• 	clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
  

• 	clock-names = "phyclk";
  

• 	#clock-cells = <0>;
  

• 	status = "disabled";
  

• 	u2phy2_host: host-port {
  

• 		#phy-cells = <0>;
  

• 		status = "disabled";
  

• 	};
  

• };
  

• };

• usb2phy3_grf: syscon@fd5dc000 {

• compatible = "rockchip,rk3588-usb2phy-grf", "syscon",
  

• 	     "simple-mfd";
  

• reg = <0x0 0xfd5dc000 0x0 0x4000>;
  

• #address-cells = <1>;
  

• #size-cells = <1>;
  

• u2phy3: usb2-phy@c000 {
  

• 	compatible = "rockchip,rk3588-usb2phy";
  

• 	reg = <0xc000 0x10>;
  

• 	interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH 0>;
  

• 	clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
  

• 	clock-names = "phyclk";
  

• 	#clock-cells = <0>;
  

• 	status = "disabled";
  

• 	u2phy3_host: host-port {
  

• 		#phy-cells = <0>;
  

• 		status = "disabled";
  

• 	};
  

• };
  

• };

• pcie2x1l2: pcie@fe190000 { compatible = "rockchip,rk3588-pcie", "snps,dw-pcie"; #address-cells = <3>;

@@ -174,39 +83,11 @@ status = "disabled"; };

• otp: nvmem@fecc0000 {

• compatible = "rockchip,rk3588-otp";
  

• reg = <0x0 0xfecc0000 0x0 0x400>;
  

• #address-cells = <1>;
  

• #size-cells = <1>;
  

• status = "okay";
  

• cpu_id: id@7 {
  

• 	reg = <0x07 0x10>;
  

• };
  

• };

• rng: rng@fe378000 { compatible = "rockchip,trngv1"; reg = <0x0 0xfe378000 0x0 0x200>; status = "disabled"; };

• combphy0_ps: phy@fee00000 {

• compatible = "rockchip,rk3588-naneng-combphy";
  

• reg = <0x0 0xfee00000 0x0 0x100>;
  

• #phy-cells = <1>;
  

• clocks = <&cru CLK_REF_PIPE_PHY0>, <&cru PCLK_PCIE_COMBO_PIPE_PHY0>,
  

• 	 <&cru PCLK_PHP_ROOT>;
  

• clock-names = "refclk", "apbclk", "phpclk";
  

• assigned-clocks = <&cru CLK_REF_PIPE_PHY0>;
  

• assigned-clock-rates = <100000000>;
  

• resets = <&cru SRST_P_PCIE2_PHY0>, <&cru SRST_REF_PIPE_PHY0>;
  

• reset-names = "combphy-apb", "combphy";
  

• rockchip,pipe-grf = <&php_grf>;
  

• rockchip,pipe-phy-grf = <&pipe_phy0_grf>;
  

• status = "disabled";
  

• }; };

  &xin24m {

diff --git a/arch/arm/dts/rk3588s.dtsi b/arch/arm/dts/rk3588s.dtsi index fca8503aed..c9f9dd2472 100644 --- a/arch/arm/dts/rk3588s.dtsi +++ b/arch/arm/dts/rk3588s.dtsi @@ -8,6 +8,8 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/power/rk3588-power.h> #include <dt-bindings/reset/rockchip,rk3588-cru.h> +#include <dt-bindings/phy/phy.h> +#include <dt-bindings/ata/ahci.h>

/ { compatible = "rockchip,rk3588"; @@ -60,6 +62,8 @@ enable-method = "psci"; capacity-dmips-mhz = <530>; clocks = <&scmi_clk SCMI_CLK_CPUL>;

• 	assigned-clocks = <&scmi_clk SCMI_CLK_CPUL>;
  

• 	assigned-clock-rates = <816000000>;
  cpu-idle-states = <&CPU_SLEEP>;
  i-cache-size = <32768>;
  i-cache-line-size = <64>;
  

@@ -136,6 +140,8 @@ enable-method = "psci"; capacity-dmips-mhz = <1024>; clocks = <&scmi_clk SCMI_CLK_CPUB01>;

• 	assigned-clocks = <&scmi_clk SCMI_CLK_CPUB01>;
  

• 	assigned-clock-rates = <816000000>;
  cpu-idle-states = <&CPU_SLEEP>;
  i-cache-size = <65536>;
  i-cache-line-size = <64>;
  

@@ -174,6 +180,8 @@ enable-method = "psci"; capacity-dmips-mhz = <1024>; clocks = <&scmi_clk SCMI_CLK_CPUB23>;

• 	assigned-clocks = <&scmi_clk SCMI_CLK_CPUB23>;
  

• 	assigned-clock-rates = <816000000>;
  cpu-idle-states = <&CPU_SLEEP>;
  i-cache-size = <65536>;
  i-cache-line-size = <64>;
  

@@ -222,6 +230,8 @@ cache-size = <131072>; cache-line-size = <64>; cache-sets = <512>;

• 	cache-level = <2>;
  

• 	cache-unified;
  next-level-cache = <&l3_cache>;
  

  };

@@ -230,6 +240,8 @@ cache-size = <131072>; cache-line-size = <64>; cache-sets = <512>;

• 	cache-level = <2>;
  

• 	cache-unified;
  next-level-cache = <&l3_cache>;
  

  };

@@ -238,6 +250,8 @@ cache-size = <131072>; cache-line-size = <64>; cache-sets = <512>;

• 	cache-level = <2>;
  

• 	cache-unified;
  next-level-cache = <&l3_cache>;
  

  };

@@ -246,6 +260,8 @@ cache-size = <131072>; cache-line-size = <64>; cache-sets = <512>;

• 	cache-level = <2>;
  

• 	cache-unified;
  next-level-cache = <&l3_cache>;
  

  };

@@ -254,6 +270,8 @@ cache-size = <524288>; cache-line-size = <64>; cache-sets = <1024>;

• 	cache-level = <2>;
  

• 	cache-unified;
  next-level-cache = <&l3_cache>;
  

  };

@@ -262,6 +280,8 @@ cache-size = <524288>; cache-line-size = <64>; cache-sets = <1024>;

• 	cache-level = <2>;
  

• 	cache-unified;
  next-level-cache = <&l3_cache>;
  

  };

@@ -270,6 +290,8 @@ cache-size = <524288>; cache-line-size = <64>; cache-sets = <1024>;

• 	cache-level = <2>;
  

• 	cache-unified;
  next-level-cache = <&l3_cache>;
  

  };

@@ -278,6 +300,8 @@ cache-size = <524288>; cache-line-size = <64>; cache-sets = <1024>;

• 	cache-level = <2>;
  

• 	cache-unified;
  next-level-cache = <&l3_cache>;
  

  };

@@ -286,6 +310,8 @@ cache-size = <3145728>; cache-line-size = <64>; cache-sets = <4096>;

• 	cache-level = <3>;
  

• 	cache-unified;
  

  }; };

@@ -304,10 +330,6 @@

	scmi_clk: protocol@14 {
		reg = <0x14>;

• 		assigned-clocks = <&scmi_clk SCMI_CLK_CPUB01>,
  

• 				  <&scmi_clk SCMI_CLK_CPUB23>;
  

• 		assigned-clock-rates = <1200000000>,
  

• 				       <1200000000>;
  	#clock-cells = <1>;
  };
  
  

@@ -377,6 +399,50 @@ }; };

• usb_host0_ehci: usb@fc800000 {

• compatible = "rockchip,rk3588-ehci", "generic-ehci";
  

• reg = <0x0 0xfc800000 0x0 0x40000>;
  

• interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH 0>;
  

• clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>;
  

Here ^^

• phys = <&u2phy2_host>;
  

• phy-names = "usb";
  

• power-domains = <&power RK3588_PD_USB>;
  

• status = "disabled";
  

• };
• usb_host0_ohci: usb@fc840000 {

• compatible = "rockchip,rk3588-ohci", "generic-ohci";
  

• reg = <0x0 0xfc840000 0x0 0x40000>;
  

• interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 0>;
  

• clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST_ARB0>, <&cru ACLK_USB>, <&u2phy2>;
  

And here

• phys = <&u2phy2_host>;
  

• phy-names = "usb";
  

• power-domains = <&power RK3588_PD_USB>;
  

• status = "disabled";
  

• };
• usb_host1_ehci: usb@fc880000 {

• compatible = "rockchip,rk3588-ehci", "generic-ehci";
  

• reg = <0x0 0xfc880000 0x0 0x40000>;
  

• interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 0>;
  

• clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>, <&cru ACLK_USB>, <&u2phy3>;
  

Ditto

• phys = <&u2phy3_host>;
  

• phy-names = "usb";
  

• power-domains = <&power RK3588_PD_USB>;
  

• status = "disabled";
  

• };
• usb_host1_ohci: usb@fc8c0000 {

• compatible = "rockchip,rk3588-ohci", "generic-ohci";
  

• reg = <0x0 0xfc8c0000 0x0 0x40000>;
  

• interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 0>;
  

• clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST_ARB1>, <&cru ACLK_USB>, <&u2phy3>;
  

Ditto

• phys = <&u2phy3_host>;
  

• phy-names = "usb";
  

• power-domains = <&power RK3588_PD_USB>;
  

• status = "disabled";
  

• };

[...]