Signed-off-by: Michael Schwingen michael@schwingen.org --- board/actux1/actux1.c | 111 ++++++++++++++++++++++++---------------------- board/actux1/config.mk | 6 --- board/actux1/u-boot.lds | 42 ++++++++++++----- boards.cfg | 5 ++- include/configs/actux1.h | 63 +++++++++++++++----------- 5 files changed, 127 insertions(+), 100 deletions(-) delete mode 100644 board/actux1/config.mk
diff --git a/board/actux1/actux1.c b/board/actux1/actux1.c index e73aff8..8fb8065 100644 --- a/board/actux1/actux1.c +++ b/board/actux1/actux1.c @@ -37,49 +37,57 @@ #include <asm/arch/ixp425.h> #include <asm/io.h> #include <miiphy.h> +#ifdef CONFIG_PCI +#include <pci.h> +#include <asm/arch/ixp425pci.h> +#endif
#include "actux1_hw.h"
DECLARE_GLOBAL_DATA_PTR;
-int board_init (void) +int board_early_init_f(void) +{ + /* CS5: Debug port */ + writel(0x9d520003, IXP425_EXP_CS5); + /* CS6: HwRel */ + writel(0x81860001, IXP425_EXP_CS6); + /* CS7: LEDs */ + writel(0x80900003, IXP425_EXP_CS7); + return 0; +} + +int board_init(void) { gd->bd->bi_arch_number = MACH_TYPE_ACTUX1;
/* adress of boot parameters */ gd->bd->bi_boot_params = 0x00000100;
- GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST); - GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_IORST); + GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
- /* Setup GPIO's for PCI INTA */ - GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_PCI1_INTA); - GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_PCI1_INTA); + /* Setup GPIOs for PCI INTA */ + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI1_INTA); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI1_INTA);
- /* Setup GPIO's for 33MHz clock output */ - GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK); - GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK); - *IXP425_GPIO_GPCLKR = 0x011001FF; + /* Setup GPIOs for 33MHz clock output */ + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK); + writel(0x011001FF, IXP425_GPIO_GPCLKR);
- /* CS5: Debug port */ - *IXP425_EXP_CS5 = 0x9d520003; - /* CS6: HwRel */ - *IXP425_EXP_CS6 = 0x81860001; - /* CS7: LEDs */ - *IXP425_EXP_CS7 = 0x80900003; - - udelay (533); - GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST); + udelay(533); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
- ACTUX1_LED1 (2); - ACTUX1_LED2 (2); - ACTUX1_LED3 (0); - ACTUX1_LED4 (0); - ACTUX1_LED5 (0); - ACTUX1_LED6 (0); - ACTUX1_LED7 (0); + ACTUX1_LED1(2); + ACTUX1_LED2(2); + ACTUX1_LED3(0); + ACTUX1_LED4(0); + ACTUX1_LED5(0); + ACTUX1_LED6(0); + ACTUX1_LED7(0);
- ACTUX1_HS (ACTUX1_HS_DCD); + ACTUX1_HS(ACTUX1_HS_DCD);
return 0; } @@ -87,20 +95,20 @@ int board_init (void) /* * Check Board Identity */ -int checkboard (void) +int checkboard(void) { - char *s = getenv ("serial#"); + char *s = getenv("serial#");
- puts ("Board: AcTux-1 rev."); - putc (ACTUX1_BOARDREL + 'A' - 1); + puts("Board: AcTux-1 rev."); + putc(ACTUX1_BOARDREL + 'A' - 1);
if (s != NULL) { - puts (", serial# "); - puts (s); + puts(", serial# "); + puts(s); } - putc ('\n'); + putc('\n');
- return (0); + return 0; }
/************************************************************************* @@ -109,39 +117,36 @@ int checkboard (void) * 1 = Rev. A * 2 = Rev. B *************************************************************************/ -u32 get_board_rev (void) +u32 get_board_rev(void) { return ACTUX1_BOARDREL; }
-int dram_init (void) +int dram_init(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return (0); + gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20); + return 0; }
-#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI) -extern struct pci_controller hose; -extern void pci_ixp_init (struct pci_controller *hose);
-void pci_init_board (void) +#ifdef CONFIG_PCI +struct pci_controller hose; + +void pci_init_board(void) { - extern void pci_ixp_init (struct pci_controller *hose); - pci_ixp_init (&hose); + pci_ixp_init(&hose); } #endif
-void reset_phy (void) +void reset_phy(void) { u16 id1, id2;
/* initialize the PHY */ - miiphy_reset ("NPE0", CONFIG_PHY_ADDR); + miiphy_reset("NPE0", CONFIG_PHY_ADDR);
- miiphy_read ("NPE0", CONFIG_PHY_ADDR, MII_PHYSID1, &id1); - miiphy_read ("NPE0", CONFIG_PHY_ADDR, MII_PHYSID2, &id2); + miiphy_read("NPE0", CONFIG_PHY_ADDR, MII_PHYSID1, &id1); + miiphy_read("NPE0", CONFIG_PHY_ADDR, MII_PHYSID2, &id2);
id2 &= 0xFFF0; /* mask out revision bits */
@@ -152,9 +157,9 @@ void reset_phy (void) * LED2 (unused) = LINK, * LED3(red) = Coll */ - miiphy_write ("NPE0", CONFIG_PHY_ADDR, 20, 0xD432); + miiphy_write("NPE0", CONFIG_PHY_ADDR, 20, 0xD432); } else if (id1 == 0x143 && id2 == 0xbc30) { /* BCM5241: default values are OK */ } else - printf ("unknown ethernet PHY ID: %x %x\n", id1, id2); + printf("unknown ethernet PHY ID: %x %x\n", id1, id2); } diff --git a/board/actux1/config.mk b/board/actux1/config.mk deleted file mode 100644 index 88634f7..0000000 --- a/board/actux1/config.mk +++ /dev/null @@ -1,6 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x00e00000 - -# include NPE ethernet driver -BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.o - -LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds diff --git a/board/actux1/u-boot.lds b/board/actux1/u-boot.lds index 5c1ece7..6809ef7 100644 --- a/board/actux1/u-boot.lds +++ b/board/actux1/u-boot.lds @@ -30,15 +30,15 @@ SECTIONS
. = ALIGN (4); .text : { - arch/arm/cpu/ixp/start.o(.text) - lib/string.o(.text) - lib/vsprintf.o(.text) - arch/arm/lib/board.o(.text) - common/dlmalloc.o(.text) - arch/arm/cpu/ixp/cpu.o(.text) + arch/arm/cpu/ixp/start.o(.text*) + net/libnet.o(.text*) + board/actux1/libactux1.o(.text*) + arch/arm/cpu/ixp/libixp.o(.text*) + drivers/serial/libserial.o(.text*) + . = env_offset; common/env_embedded.o(.ppcenv) - * (.text) + *(.text*) }
. = ALIGN (4); @@ -47,7 +47,7 @@ SECTIONS } . = ALIGN (4); .data : { - *(.data) + *(.data*) } . = ALIGN (4); .got : { @@ -61,10 +61,26 @@ SECTIONS __u_boot_cmd_end =.;
. = ALIGN (4); - __bss_start =.; - .bss (NOLOAD): { - *(.bss) - . = ALIGN(4); + .rel.dyn : { + __rel_dyn_start = .; + *(.rel*) + __rel_dyn_end = .; + } + + .dynsym : { + __dynsym_start = .; + *(.dynsym) + } + + .bss __rel_dyn_start (OVERLAY) : { + __bss_start = .; + *(.bss*) + . = ALIGN(4); + _end = .; } - _end =.; + /DISCARD/ : { *(.dynstr*) } + /DISCARD/ : { *(.dynamic*) } + /DISCARD/ : { *(.plt*) } + /DISCARD/ : { *(.interp*) } + /DISCARD/ : { *(.gnu*) } } diff --git a/boards.cfg b/boards.cfg index c3b164e..1e7d41c 100644 --- a/boards.cfg +++ b/boards.cfg @@ -127,7 +127,10 @@ omap4_sdp4430 arm armv7 sdp4430 ti s5p_goni arm armv7 goni samsung s5pc1xx smdkc100 arm armv7 smdkc100 samsung s5pc1xx s5pc210_universal arm armv7 universal_c210 samsung s5pc2xx -actux1 arm ixp +actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2 +actux1_8_16 arm ixp actux1 - - actux1:FLASH1X8 +actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB +actux1_8_32 arm ixp actux1 - - actux1:FLASH1X8,RAM_32MB actux2 arm ixp actux3 arm ixp actux4 arm ixp diff --git a/include/configs/actux1.h b/include/configs/actux1.h index 8886eff..160c10a 100644 --- a/include/configs/actux1.h +++ b/include/configs/actux1.h @@ -26,13 +26,6 @@ #ifndef __CONFIG_H #define __CONFIG_H
-/* 1: modified board with 32MB DRAM */ -#define CONFIG_ACTUX1_32MB 0 -/* 1: 2*2MB FLASH (standard) */ -#define CONFIG_ACTUX1_FLASH2X2 1 -/* 1: 1*8MB FLASH (upgraded boards) */ -#define CONFIG_ACTUX1_FLASH1X8 0 - #define CONFIG_IXP425 1 #define CONFIG_ACTUX1 1
@@ -44,17 +37,16 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTDELAY 3 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ +#define CONFIG_BOARD_EARLY_INIT_F 1 +#define CONFIG_SYS_LDSCRIPT "board/actux1/u-boot.lds"
/*************************************************************** * U-boot generic defines start here. ***************************************************************/ -#undef CONFIG_USE_IRQ - /* * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) -/* size in bytes reserved for initial data */
/* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -63,8 +55,13 @@ #include <config_cmd_default.h>
#define CONFIG_CMD_ELF -#undef CONFIG_CMD_PCI -#undef CONFIG_PCI +#ifdef CONFIG_PCI +#define CONFIG_CMD_PCI +#define CONFIG_PCI_PNP +#define CONFIG_IXP_PCI +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_CMD_PCI_ENUM +#endif
#define CONFIG_BOOTCOMMAND "run boot_flash" /* enable passing of ATAGs */ @@ -94,8 +91,9 @@ #define CONFIG_SYS_MEMTEST_START 0x00400000 #define CONFIG_SYS_MEMTEST_END 0x00800000
-/* spec says 66.666 MHz, but it appears to be 33 */ -#define CONFIG_SYS_HZ 3333333 +/* timer clock - 2* OSC_IN system clock */ +#define CONFIG_IXP425_TIMER_CLK 66666666 +#define CONFIG_SYS_HZ 1000
/* default load address */ #define CONFIG_SYS_LOAD_ADDR 0x00010000 @@ -110,10 +108,6 @@ * The stack sizes are set up in start.S using the settings below */ #define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -# define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -# define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif
/* Expansion bus settings */ #define CONFIG_SYS_EXP_CS0 0xbd113842 @@ -121,9 +115,9 @@ /* SDRAM settings */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x00000000 -#define CONFIG_SYS_DRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#if CONFIG_ACTUX1_32MB +#ifdef CONFIG_RAM_32MB # define CONFIG_SYS_SDR_CONFIG 0x18 # define PHYS_SDRAM_1_SIZE 0x02000000 # define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a @@ -137,8 +131,11 @@ # define CONFIG_SYS_DRAM_SIZE 0x01000000 #endif
+ + /* FLASH organization */ -#if CONFIG_ACTUX1_FLASH2X2 +#define CONFIG_SYS_TEXT_BASE 0x50000000 +#ifdef CONFIG_FLASH2X2 # define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of sectors on one chip */ # define CONFIG_SYS_MAX_FLASH_SECT 40 @@ -146,7 +143,7 @@ # define PHYS_FLASH_2 0x50200000 # define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } #endif -#if CONFIG_ACTUX1_FLASH1X8 +#ifdef CONFIG_FLASH1X8 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of sectors on one chip */ # define CONFIG_SYS_MAX_FLASH_SECT 140 @@ -157,6 +154,7 @@ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 #define CONFIG_SYS_MONITOR_LEN (256 << 10) +#define CONFIG_BOARD_SIZE_LIMIT 262144
/* Use common CFI driver */ #define CONFIG_SYS_FLASH_CFI @@ -173,12 +171,16 @@ #define CONFIG_NET_MULTI 1 /* NPE0 PHY address */ #define CONFIG_PHY_ADDR 0 +/* NPE1 PHY address (HW Release E only) */ +#define CONFIG_PHY1_ADDR 1 /* MII PHY management */ #define CONFIG_MII 1 /* Number of ethernet rx buffers & descriptors */ #define CONFIG_SYS_RX_ETH_BUFFER 16 #define CONFIG_RESET_PHY_R 1
+#define CONFIG_HAS_ETH1 1 + #define CONFIG_CMD_DHCP #define CONFIG_CMD_NET #define CONFIG_CMD_MII @@ -203,17 +205,19 @@ #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000) #define CONFIG_SYS_USE_PPCENV 1
-#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CONFIG_EXTRA_ENV_SETTINGS \ "npe_ucode=50040000\0" \ "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \ "kerneladdr=50050000\0" \ + "kernelfile=actux1/uImage\0" \ + "rootfile=actux1/rootfs\0" \ "rootaddr=50170000\0" \ "loadaddr=10000\0" \ "updateboot_ser=mw.b 10000 ff 40000;" \ " loady ${loadaddr};" \ " run eraseboot writeboot\0" \ "updateboot_net=mw.b 10000 ff 40000;" \ - " tftp ${loadaddr} u-boot.bin;" \ + " tftp ${loadaddr} actux1/u-boot.bin;" \ " run eraseboot writeboot\0" \ "eraseboot=protect off 50000000 50003fff;" \ " protect off 50006000 5003ffff;" \ @@ -221,8 +225,9 @@ " erase 50006000 5003ffff\0" \ "writeboot=cp.b 10000 50000000 4000;" \ " cp.b 16000 50006000 3a000\0" \ - "eraseenv=protect off 50004000 50005fff;" \ - " erase 50004000 50005fff\0" \ + "updateucode=loady;" \ + " era ${npe_ucode} +${filesize};" \ + " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \ "updateroot=tftp ${loadaddr} ${rootfile};" \ " era ${rootaddr} +${filesize};" \ " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ @@ -233,7 +238,7 @@ " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ - "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ + "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \ "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ "boot_flash=run flashargs addtty addeth;" \ " bootm ${kerneladdr}\0" \ @@ -241,4 +246,8 @@ " tftpboot ${loadaddr} ${kernelfile};" \ " bootm\0"
+/* additions for new relocation code, must be added to all boards */ +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) + #endif /* __CONFIG_H */