Hi Stefano,
Could this series be applied, please?
On Fri, Jul 12, 2019 at 9:32 AM Fabio Estevam festevam@gmail.com wrote:
Allow enable_ipu_clock() to be built for SPL code. This is done in preparation for configuring the NoC registers on i.MX6QP in SPL.
Signed-off-by: Fabio Estevam festevam@gmail.com
arch/arm/mach-imx/mx6/clock.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c index 366a4e3c6b..5af1ae7cf3 100644 --- a/arch/arm/mach-imx/mx6/clock.c +++ b/arch/arm/mach-imx/mx6/clock.c @@ -1275,6 +1275,22 @@ unsigned int mxc_get_clock(enum mxc_clock clk) return 0; }
+#ifndef CONFIG_MX6SX +void enable_ipu_clock(void) +{
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;int reg;reg = readl(&mxc_ccm->CCGR3);reg |= MXC_CCM_CCGR3_IPU1_IPU_MASK;writel(reg, &mxc_ccm->CCGR3);if (is_mx6dqp()) {setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_PRG_CLK0_MASK);setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_IPU2_IPU_MASK);}+} +#endif
#ifndef CONFIG_SPL_BUILD /*
- Dump some core clockes.
@@ -1311,22 +1327,6 @@ int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; }
-#ifndef CONFIG_MX6SX -void enable_ipu_clock(void) -{
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;int reg;reg = readl(&mxc_ccm->CCGR3);reg |= MXC_CCM_CCGR3_IPU1_IPU_MASK;writel(reg, &mxc_ccm->CCGR3);if (is_mx6dqp()) {setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_PRG_CLK0_MASK);setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_IPU2_IPU_MASK);}-} -#endif
#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) || defined(CONFIG_MX6DL) || \ defined(CONFIG_MX6S) static void disable_ldb_di_clock_sources(void) -- 2.17.1