Hi Marek,
On 11/26/19 1:34 AM, Marek Vasut wrote:
Instead of explicitly setting up each SDQS register, use a loop. No functional change.
Signed-off-by: Marek Vasut marex@denx.de Cc: Eric Nelson eric@nelint.com Cc: Fabio Estevam fabio.estevam@nxp.com Cc: Stefano Babic sbabic@denx.de
arch/arm/mach-imx/mx6/ddr.c | 27 ++++++++------------------- 1 file changed, 8 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c index e917b04f3d..b2402f75db 100644 --- a/arch/arm/mach-imx/mx6/ddr.c +++ b/arch/arm/mach-imx/mx6/ddr.c @@ -249,25 +249,14 @@ static void mmdc_set_sdqs(bool set) { struct mx6dq_iomux_ddr_regs *mx6_ddr_iomux = (struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE;
- if (set) {
setbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);setbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);setbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);setbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);setbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);setbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);setbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);setbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);- } else {
clrbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);clrbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);clrbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);clrbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);clrbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);clrbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);clrbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);clrbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
- u32 sdqs = (u32)(&mx6_ddr_iomux->dram_sdqs0);
- int i;
- for (i = 0; i < 8; i++) {
if (set)setbits_le32(sdqs + (4 * i), 0x7000);elseclrbits_le32(sdqs + (4 * i), 0x7000);
Reviewed-by: Eric Nelson eric@nelint.com