diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c
--- a/drivers/cfi_flash.c
+++ b/drivers/cfi_flash.c
@@ -105,12 +105,17 @@
 #define AMD_CMD_ERASE_SECTOR		0x30
 #define AMD_CMD_UNLOCK_START		0xAA
 #define AMD_CMD_UNLOCK_ACK		0x55
+#define AMD_CMD_WRITE_TO_BUFFER 0x25
+#define AMD_CMD_WRITE_BUFFER_CONFIRM    0x29
 
 #define AMD_STATUS_TOGGLE		0x40
 #define AMD_STATUS_ERROR		0x20
 #define AMD_ADDR_ERASE_START		0x555
 #define AMD_ADDR_START			0x555
 #define AMD_ADDR_ACK			0x2AA
+#define AMD_ADDR_ERASE_START_8BIT   0xAAA
+#define AMD_ADDR_START_8BIT     0xAAA
+#define AMD_ADDR_ACK_8BIT       0x555
 
 #define FLASH_OFFSET_CFI		0x55
 #define FLASH_OFFSET_CFI_RESP		0x10
@@ -423,8 +428,12 @@ int flash_erase (flash_info_t * info, in
 			case CFI_CMDSET_AMD_STANDARD:
 			case CFI_CMDSET_AMD_EXTENDED:
 				flash_unlock_seq (info, sect);
-				flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
+                if ( (info->portwidth) == FLASH_CFI_8BIT )
+					flash_write_cmd (info, sect, AMD_ADDR_ERASE_START_8BIT,
 							AMD_CMD_ERASE_START);
+				else
+					flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
+							AMD_CMD_ERASE_START);								
 				flash_unlock_seq (info, sect);
 				flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
 				break;
@@ -554,7 +563,10 @@ int write_buff (flash_info_t * info, uch
 	buffered_size = (info->portwidth / info->chipwidth);
 	buffered_size *= info->buffer_size;
 	while (cnt >= info->portwidth) {
-		i = buffered_size > cnt ? cnt : buffered_size;
+		/* write buffer until next buffered_size aligned boundary */
+		i = buffered_size - (wp % buffered_size);
+		if (i>cnt)
+			i = cnt;
 		if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
 			return rc;
 		i -= i & (info->portwidth - 1);
@@ -873,8 +885,16 @@ static void flash_write_cmd (flash_info_
 
 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 {
-	flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
-	flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
+	switch (info->portwidth) {
+		case FLASH_CFI_8BIT:
+			flash_write_cmd (info, sect, AMD_ADDR_START_8BIT, AMD_CMD_UNLOCK_START);
+			flash_write_cmd (info, sect, AMD_ADDR_ACK_8BIT, AMD_CMD_UNLOCK_ACK);
+			break;
+		default:
+			flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
+			flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
+			break;
+	}
 }
 
 /*-----------------------------------------------------------------------
@@ -1223,66 +1243,109 @@ static int flash_write_cfibuffer (flash_
 	int retcode;
 	volatile cfiptr_t src;
 	volatile cfiptr_t dst;
-	/* buffered writes in the AMD chip set is not supported yet */
-	if((info->vendor ==  CFI_CMDSET_AMD_STANDARD) ||
-		(info->vendor == CFI_CMDSET_AMD_EXTENDED))
-		return ERR_INVAL;
-
-	src.cp = cp;
-	dst.cp = (uchar *) dest;
-	sector = find_sector (info, dest);
-	flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
-	flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
-	if ((retcode =
-	     flash_status_check (info, sector, info->buffer_write_tout,
-				 "write to buffer")) == ERR_OK) {
-		/* reduce the number of loops by the width of the port	*/
-		switch (info->portwidth) {
-		case FLASH_CFI_8BIT:
-			cnt = len;
-			break;
-		case FLASH_CFI_16BIT:
-			cnt = len >> 1;
-			break;
-		case FLASH_CFI_32BIT:
-			cnt = len >> 2;
-			break;
-		case FLASH_CFI_64BIT:
-			cnt = len >> 3;
-			break;
-		default:
-			return ERR_INVAL;
-			break;
-		}
-		flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
-		while (cnt-- > 0) {
+
+    switch (info->vendor){
+		case CFI_CMDSET_INTEL_STANDARD:
+		case CFI_CMDSET_INTEL_EXTENDED:
+			src.cp = cp;
+			dst.cp = (uchar *) dest;
+			sector = find_sector (info, dest);
+			flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
+			flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
+			if ((retcode =
+						flash_status_check (info, sector, info->buffer_write_tout,
+							"write to buffer")) == ERR_OK) {
+				/* reduce the number of loops by the width of the port	*/
+				switch (info->portwidth) {
+					case FLASH_CFI_8BIT:
+						cnt = len;
+						break;
+					case FLASH_CFI_16BIT:
+						cnt = len >> 1;
+						break;
+					case FLASH_CFI_32BIT:
+						cnt = len >> 2;
+						break;
+					case FLASH_CFI_64BIT:
+						cnt = len >> 3;
+						break;
+					default:
+						return ERR_INVAL;
+						break;
+				}
+				flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
+				while (cnt-- > 0) {
+					switch (info->portwidth) {
+						case FLASH_CFI_8BIT:
+							*dst.cp++ = *src.cp++;
+							break;
+						case FLASH_CFI_16BIT:
+							*dst.wp++ = *src.wp++;
+							break;
+						case FLASH_CFI_32BIT:
+							*dst.lp++ = *src.lp++;
+							break;
+						case FLASH_CFI_64BIT:
+							*dst.llp++ = *src.llp++;
+							break;
+						default:
+							return ERR_INVAL;
+							break;
+					}
+				}
+				flash_write_cmd (info, sector, 0,
+						FLASH_CMD_WRITE_BUFFER_CONFIRM);
+				retcode =
+					flash_full_status_check (info, sector,
+							info->buffer_write_tout,
+							"buffer write");
+			}
+			flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
+			return retcode;
+			
+		case CFI_CMDSET_AMD_STANDARD:
+		case CFI_CMDSET_AMD_EXTENDED:
+			src.cp = cp;
+			dst.cp = (uchar *) dest;
+			sector = find_sector (info, dest);
+			
+			flash_unlock_seq(info,0);
+			flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
+			
 			switch (info->portwidth) {
-			case FLASH_CFI_8BIT:
-				*dst.cp++ = *src.cp++;
-				break;
-			case FLASH_CFI_16BIT:
-				*dst.wp++ = *src.wp++;
-				break;
-			case FLASH_CFI_32BIT:
-				*dst.lp++ = *src.lp++;
-				break;
-			case FLASH_CFI_64BIT:
-				*dst.llp++ = *src.llp++;
-				break;
-			default:
-				return ERR_INVAL;
-				break;
+				case FLASH_CFI_8BIT:
+					cnt = len;
+					flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
+					while (cnt-- > 0) *dst.cp++ = *src.cp++;
+					break;
+				case FLASH_CFI_16BIT:
+					cnt = len >> 1;
+					flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
+					while (cnt-- > 0) *dst.wp++ = *src.wp++;
+					break;
+				case FLASH_CFI_32BIT:
+					cnt = len >> 2;
+					flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
+					while (cnt-- > 0) *dst.lp++ = *src.lp++;
+					break;
+				case FLASH_CFI_64BIT:
+					cnt = len >> 3;
+					flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
+					while (cnt-- > 0) *dst.llp++ = *src.llp++;
+					break;					
+				default:
+					return ERR_INVAL;
 			}
-		}
-		flash_write_cmd (info, sector, 0,
-				 FLASH_CMD_WRITE_BUFFER_CONFIRM);
-		retcode =
-			flash_full_status_check (info, sector,
-						 info->buffer_write_tout,
-						 "buffer write");
+			
+			flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
+			retcode = flash_full_status_check (info, sector, info->buffer_write_tout,
+					"buffer write");
+			return retcode;
+			
+		default:
+			debug ("Unknown Command Set\n");
+			return ERR_INVAL;
 	}
-	flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
-	return retcode;
 }
 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
 #endif /* CFG_FLASH_CFI */
