The SBI 3.0 specification [1] adds the following extensions:
* Firmware Features Extension * Message Proxy Extension
Let the sbi command detect their availability.
The Firmware Features Extension is already implemented in OpenSBI.
Correct the text for the DBTR extension and move it to the same position as in the specification.
[1] https://github.com/riscv-non-isa/riscv-sbi-doc/releases/download/vv3.0-rc1/r...
Signed-off-by: Heinrich Schuchardt heinrich.schuchardt@canonical.com --- arch/riscv/include/asm/sbi.h | 4 +++- cmd/riscv/sbi.c | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index ad32dedb589..47124dbaac8 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -33,8 +33,10 @@ enum sbi_ext_id { SBI_EXT_CPPC = 0x43505043, SBI_EXT_NACL = 0x4E41434C, SBI_EXT_STA = 0x535441, - SBI_EXT_DBTR = 0x44425452, SBI_EXT_SSE = 0x535345, + SBI_EXT_FWFT = 0x46574654, + SBI_EXT_DBTR = 0x44425452, + SBI_EXT_MPXY = 0x4D505859, };
enum sbi_ext_base_fid { diff --git a/cmd/riscv/sbi.c b/cmd/riscv/sbi.c index a231604e492..5ecf56781c1 100644 --- a/cmd/riscv/sbi.c +++ b/cmd/riscv/sbi.c @@ -54,8 +54,10 @@ static struct sbi_ext extensions[] = { { SBI_EXT_CPPC, "Collaborative Processor Performance Control Extension" }, { SBI_EXT_NACL, "Nested Acceleration Extension" }, { SBI_EXT_STA, "Steal-time Accounting Extension" }, - { SBI_EXT_DBTR, "Debug Trigger Extension" }, { SBI_EXT_SSE, "Supervisor Software Events" }, + { SBI_EXT_FWFT, "Firmware Features Extension" }, + { SBI_EXT_DBTR, "Debug Triggers Extension" }, + { SBI_EXT_MPXY, "Message Proxy Extension" }, };
static int do_sbi(struct cmd_tbl *cmdtp, int flag, int argc,