On Jul 27, 2011, at 7:58 AM, Tabi Timur-B04825 wrote:
On Tue, Jul 26, 2011 at 9:52 PM, Kumar Gala galak@kernel.crashing.org wrote:
+/* CCSRBAR PHYSICAL Address */ +/* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
SPL code*/+#if defined(CONFIG_NAND_U_BOOT) && defined(CONFIG_NAND_SPL) +#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_DEFAULT +#else +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_CCSRBAR_PHYS 0xfffe00000ull +#else +#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of */
/* CCSRBAR */+#endif +#endif +#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses */
/* CONFIG_SYS_IMMR */This conflicts with the CCSR patch I posted a couple days ago. What order are you going to be applying these patches?
I'm wanting to apply the CCSR patch first (so we'll need to update the board ports).
- k