Hi Prabhakar,
-----Original Message----- From: Prabhakar Kushwaha Sent: Monday, February 22, 2016 7:51 PM To: Qianyu Gong qianyu.gong@nxp.com; u-boot@lists.denx.de; york sun york.sun@nxp.com; oss@buserror.net Cc: Qianyu Gong qianyu.gong@nxp.com; Mingkai Hu mingkai.hu@nxp.com Subject: RE: [U-Boot] [PATCH] armv8/fsl-layerscape: add IFC fixup for LS1043A with QSPI enabled
-----Original Message----- From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Gong Qianyu Sent: Monday, February 22, 2016 3:35 PM To: u-boot@lists.denx.de; york sun york.sun@nxp.com; oss@buserror.net Cc: Qianyu Gong qianyu.gong@nxp.com; Mingkai Hu mingkai.hu@nxp.com Subject: [U-Boot] [PATCH] armv8/fsl-layerscape: add IFC fixup for LS1043A with QSPI enabled
QSPI and IFC are pin-multiplexed on LS1043A. So if QSPI is enabled, IFC should be disabled. But just disable IFC driver in LS1043A Linux is not enough because mdio-mux will access IFC address space -- actually it accesses FPGA which is connected to IFC CS3. So disable the whole IFC node in Linux device tree.
FPGA and NAND access are valid use-case during QSPI boot
So why IFC controller is being disabled from device tree.
As Mingkai explained, neither FGPA nor NAND is valid when QSPI is enabled on LS1043AQDS.
Signed-off-by: Gong Qianyu Qianyu.Gong@nxp.com
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index 4e4861d..5bb3048 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -204,4 +204,11 @@ void ft_cpu_setup(void *blob, bd_t *bd) #ifdef CONFIG_FSL_LSCH3 fdt_fixup_smmu(blob); #endif
+#ifdef CONFIG_LS1043A
I will suggest to avoid SoC specific defines
--prabhakar
I think only LS1043A needs this fixup for the moment. So if there's any change on new chips, it wouldn't affect them.
Regards, Qianyu