Now that we're actually converting the QTS-generated header files, we can even adjust their data types. A good candidate for this is the pinmux table, where each entry can have value in the range of 0..3, but each element is declared as unsigned long. By changing the type to u8, we can save over 600 Bytes from the SPL, so do it. This patch also constifies the array.
Signed-off-by: Marek Vasut marex@denx.de --- arch/arm/mach-socfpga/include/mach/system_manager.h | 3 +-- arch/arm/mach-socfpga/qts-filter.sh | 2 +- arch/arm/mach-socfpga/system_manager.c | 2 +- arch/arm/mach-socfpga/wrap_pinmux_config.c | 3 +-- board/altera/arria5-socdk/qts/pinmux_config.h | 2 +- board/altera/cyclone5-socdk/qts/pinmux_config.h | 2 +- 6 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h b/arch/arm/mach-socfpga/include/mach/system_manager.h index 46af30b..8712f8e 100644 --- a/arch/arm/mach-socfpga/include/mach/system_manager.h +++ b/arch/arm/mach-socfpga/include/mach/system_manager.h @@ -12,8 +12,7 @@ void sysmgr_pinmux_init(void); void sysmgr_config_warmrstcfgio(int enable);
-void sysmgr_get_pinmux_table(const unsigned long **table, - unsigned int *table_len); +void sysmgr_get_pinmux_table(const u8 **table, unsigned int *table_len); #endif
struct socfpga_system_manager { diff --git a/arch/arm/mach-socfpga/qts-filter.sh b/arch/arm/mach-socfpga/qts-filter.sh index 16d3a2a..fc41d99 100755 --- a/arch/arm/mach-socfpga/qts-filter.sh +++ b/arch/arm/mach-socfpga/qts-filter.sh @@ -66,7 +66,7 @@ process_pinmux_config() { EOF
# Retrieve the pinmux config and zap the ad-hoc length encoding - sed -n '/^unsigned/ !b; :next {/^unsigned/ s/[.*]/[]/;p;n;b next}' \ + sed -n '/^unsigned/ !b; :next {/^unsigned/ {s/[.*]/[]/s/unsigned long/const u8/};p;n;b next}' \ ${in_dir}/generated/pinmux_config_${soc}.c
cat << EOF diff --git a/arch/arm/mach-socfpga/system_manager.c b/arch/arm/mach-socfpga/system_manager.c index 744ec32..75a65f3 100644 --- a/arch/arm/mach-socfpga/system_manager.c +++ b/arch/arm/mach-socfpga/system_manager.c @@ -57,7 +57,7 @@ static void populate_sysmgr_fpgaintf_module(void) void sysmgr_pinmux_init(void) { uint32_t regs = (uint32_t)&sysmgr_regs->emacio[0]; - const unsigned long *sys_mgr_init_table; + const u8 *sys_mgr_init_table; unsigned int len; int i;
diff --git a/arch/arm/mach-socfpga/wrap_pinmux_config.c b/arch/arm/mach-socfpga/wrap_pinmux_config.c index bcb7781..a12f0b3 100644 --- a/arch/arm/mach-socfpga/wrap_pinmux_config.c +++ b/arch/arm/mach-socfpga/wrap_pinmux_config.c @@ -10,8 +10,7 @@ /* Board-specific header. */ #include <qts/pinmux_config.h>
-void sysmgr_get_pinmux_table(const unsigned long **table, - unsigned int *table_len) +void sysmgr_get_pinmux_table(const u8 **table, unsigned int *table_len) { *table = sys_mgr_init_table; *table_len = ARRAY_SIZE(sys_mgr_init_table); diff --git a/board/altera/arria5-socdk/qts/pinmux_config.h b/board/altera/arria5-socdk/qts/pinmux_config.h index 5a714a3..069d492 100644 --- a/board/altera/arria5-socdk/qts/pinmux_config.h +++ b/board/altera/arria5-socdk/qts/pinmux_config.h @@ -7,7 +7,7 @@ #ifndef __SOCFPGA_PINMUX_CONFIG_H__ #define __SOCFPGA_PINMUX_CONFIG_H__
-unsigned long sys_mgr_init_table[] = { +const u8 sys_mgr_init_table[] = { 0, /* EMACIO0 */ 2, /* EMACIO1 */ 2, /* EMACIO2 */ diff --git a/board/altera/cyclone5-socdk/qts/pinmux_config.h b/board/altera/cyclone5-socdk/qts/pinmux_config.h index aa282e1..33cf1fd 100644 --- a/board/altera/cyclone5-socdk/qts/pinmux_config.h +++ b/board/altera/cyclone5-socdk/qts/pinmux_config.h @@ -7,7 +7,7 @@ #ifndef __SOCFPGA_PINMUX_CONFIG_H__ #define __SOCFPGA_PINMUX_CONFIG_H__
-unsigned long sys_mgr_init_table[] = { +const u8 sys_mgr_init_table[] = { 3, /* EMACIO0 */ 3, /* EMACIO1 */ 3, /* EMACIO2 */