In cpu/arm920t/start.S the macro get_bad_stack assumes that (CONFIG_STACKSIZE+CFG_MALLOC_LEN) will fit in a 16-bit constant. I am trying to do a build where CFG_MALLOC_LEN is much larger (need buffering for gzip splash screen decompression). Assembly of the file fails with errors due to invalid constants.
make[1]: Entering directory `/home/adyer/Projects/u-boot/cpu/arm920t' arm-linux-gcc -D__ASSEMBLY__ -g -Os -fno-strict-aliasing -fno-common -ffixed-r8 -msoft-float -D__KERNEL__ -DTEXT_BASE=0x0bd80000 -I/home/adyer/Projects/u-boot/include -fno-builtin -ffreestanding -nostdinc -isystem /home/adyer/usr/bin/../lib/gcc/arm-linux/4.0.0/include -pipe -DCONFIG_ARM -D__ARM__ -march=armv4 -mabi=apcs-gnu -c -o start.o start.S start.S: Assembler messages: start.S:375: Error: invalid constant -- `sub r13,r13,#((120<<10)+(4<<20))' start.S:376: Error: invalid constant -- `sub r2,r2,#((120<<10)+(4<<20))' start.S:381: Error: invalid constant -- `sub r13,r13,#((120<<10)+(4<<20))' start.S:382: Error: invalid constant -- `sub r2,r2,#((120<<10)+(4<<20))' start.S:387: Error: invalid constant -- `sub r13,r13,#((120<<10)+(4<<20))' start.S:388: Error: invalid constant -- `sub r2,r2,#((120<<10)+(4<<20))' start.S:393: Error: invalid constant -- `sub r13,r13,#((120<<10)+(4<<20))' start.S:394: Error: invalid constant -- `sub r2,r2,#((120<<10)+(4<<20))' start.S:399: Error: invalid constant -- `sub r13,r13,#((120<<10)+(4<<20))' start.S:400: Error: invalid constant -- `sub r2,r2,#((120<<10)+(4<<20))' start.S:424: Error: invalid constant -- `sub r13,r13,#((120<<10)+(4<<20))' start.S:425: Error: invalid constant -- `sub r2,r2,#((120<<10)+(4<<20))' start.S:430: Error: invalid constant -- `sub r13,r13,#((120<<10)+(4<<20))' start.S:431: Error: invalid constant -- `sub r2,r2,#((120<<10)+(4<<20))' make[1]: *** [start.o] Error 1 make[1]: Leaving directory `/home/adyer/Projects/u-boot/cpu/arm920t' make: *** [cpu/arm920t/libarm920t.a] Error 2
the macro looks like this:
.macro get_bad_stack ldr r13, _armboot_start @ setup our mode stack sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN) sub r13, r13, #(CFG_GBL_DATA_SIZE+8)
str lr, [r13] @ save caller lr / spsr mrs lr, spsr str lr, [r13, #4]
mov r13, #MODE_SVC @ prepare SVC-Mode @ msr spsr_c, r13 msr spsr, r13 mov lr, pc movs pc, lr .endm
It looks like this macro is called from an exception context. I'm an ARM newbie, so I'm looking for some help. What registers are safe to use in this context so I can calculate a good stack location? Any other ideas on how to get around this?