On Tue, 27 Mar 2018, Kever Yang wrote:
All rockchip SoCs can use ns16550 driver, enable it for all and set SYS_NS16550_MEM32 for all SoCs.
Signed-off-by: Kever Yang kever.yang@rock-chips.com Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
See below for a question.
Note that I believe that the NS16550 changes should go into a separate series and be split off this huge series (which honestly is trying to do too many things at once).
arch/arm/Kconfig | 1 + arch/arm/mach-rockchip/Kconfig | 1 - include/configs/rk3036_common.h | 3 --- include/configs/rk3128_common.h | 2 -- include/configs/rk3188_common.h | 2 -- include/configs/rk322x_common.h | 1 - include/configs/rk3288_common.h | 2 -- include/configs/rk3328_common.h | 2 -- include/configs/rk3368_common.h | 2 -- include/configs/rk3399_common.h | 2 -- include/configs/rockchip-common.h | 2 ++ include/configs/rv1108_common.h | 3 --- 12 files changed, 3 insertions(+), 20 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2c52ff0..3e9a80d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1167,6 +1167,7 @@ config ARCH_ROCKCHIP select DM_PWM select DM_REGULATOR select ENABLE_ARM_SOC_BOOT0_HOOK
- select SYS_NS16550
Just wondering: shouldn't this be an 'imply'?
imply CMD_FASTBOOT imply FASTBOOT imply FAT_WRITE diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 0adaed4..007cb22 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -103,7 +103,6 @@ config ROCKCHIP_RK3368 imply SPL_SERIAL_SUPPORT imply TPL_SERIAL_SUPPORT select DEBUG_UART_BOARD_INIT
- select SYS_NS16550 help The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised into a big and little cluster with 4 cores each) Cortex-A53 including
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index f39a272..c5ec864 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -18,9 +18,6 @@ #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
-#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 #define CONFIG_SPL_STACK 0x10081fff diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index bd8019c..c593f18 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -19,8 +19,6 @@ #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
-#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 94f8cda..30c150e 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -22,8 +22,6 @@ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) #define CONFIG_SYS_TIMER_COUNTS_DOWN
-#define CONFIG_SYS_NS16550_MEM32
#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */ #endif diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index 7f9c7fb..832f037 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -18,7 +18,6 @@ #define CONFIG_SYS_TIMER_BASE 0x110c00a0 /* TIMER5 */ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
-#define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 #define CONFIG_SPL_STACK 0x10088000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 78595b8..44d5c2a 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -19,8 +19,6 @@ #define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */ #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
-#define CONFIG_SYS_NS16550_MEM32
#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM /* Bootrom will load u-boot binary to 0x0 once return from SPL */ #endif diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 7018668..ce650c8 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SYS_LOAD_ADDR 0x00800800
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index a7fe4ca..866383d 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -22,8 +22,6 @@ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SYS_LOAD_ADDR 0x00280000
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index fe8c675..53691e5 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -17,8 +17,6 @@ #define CONFIG_SPL_SPI_LOAD #endif
-#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SYS_LOAD_ADDR 0x00800800 #define CONFIG_SPL_STACK 0xff8effff diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index 24651ce..4062480 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -12,6 +12,8 @@ #define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000
+#define CONFIG_SYS_NS16550_MEM32
#ifndef CONFIG_SPL_BUILD
/* First try to boot from SD (index 0), then eMMC (index 1) */ diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 349c53c..cd204e9 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -18,9 +18,6 @@ #define CONFIG_SYS_TIMER_BASE 0x10350020 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
-#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_SDRAM_BASE 0x60000000 #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000)