This patch makes sure that the Devicetree for the sama5 boards are aligned with the Devicetree from Linux. This implies removing the GPIO compatible and replacing it with the PINCTRL one, as well as unifying the SDMMC pinctrl related subnodes under one single subnode.
Signed-off-by: Sergiu Moga sergiu.moga@microchip.com --- arch/arm/dts/at91-sama5d27_giantboard.dts | 59 +++-- arch/arm/dts/at91-sama5d27_som1_ek.dts | 80 +++---- .../dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi | 6 +- arch/arm/dts/at91-sama5d27_wlsom1_ek.dts | 92 ++++---- arch/arm/dts/at91-sama5d2_icp.dts | 134 ++++++------ arch/arm/dts/at91-sama5d2_ptc_ek.dts | 98 ++++----- arch/arm/dts/at91-sama5d2_xplained.dts | 204 +++++++++--------- arch/arm/dts/sama5d2.dtsi | 9 +- arch/arm/dts/sama5d27_som1.dtsi | 94 ++++---- arch/arm/dts/sama5d27_wlsom1.dtsi | 54 +++-- 10 files changed, 411 insertions(+), 419 deletions(-)
diff --git a/arch/arm/dts/at91-sama5d27_giantboard.dts b/arch/arm/dts/at91-sama5d27_giantboard.dts index e81ca60ca0..2625f81c8b 100644 --- a/arch/arm/dts/at91-sama5d27_giantboard.dts +++ b/arch/arm/dts/at91-sama5d27_giantboard.dts @@ -30,7 +30,7 @@ sdmmc1: sdio-host@b0000000 { bus-width = <4>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>; + pinctrl-0 = <&pinctrl_sdmmc1_default>; status = "okay"; u-boot,dm-pre-reloc; }; @@ -73,10 +73,9 @@ u-boot,dm-pre-reloc; };
- pioA: gpio@fc038000 { - pinctrl { - - pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default { + pioA: pinctrl@fc038000 { + pinctrl_sdmmc1_default: sdmmc1_default { + cmd_data { pinmux = <PIN_PA28__SDMMC1_CMD>, <PIN_PA18__SDMMC1_DAT0>, <PIN_PA19__SDMMC1_DAT1>, @@ -86,41 +85,41 @@ u-boot,dm-pre-reloc; };
- pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default { + ck_cd { pinmux = <PIN_PA22__SDMMC1_CK>, <PIN_PA30__SDMMC1_CD>; bias-disable; u-boot,dm-pre-reloc; }; + };
- pinctrl_uart1_default: uart1_default { - pinmux = <PIN_PD2__URXD1>, - <PIN_PD3__UTXD1>; - bias-disable; - u-boot,dm-pre-reloc; - }; + pinctrl_uart1_default: uart1_default { + pinmux = <PIN_PD2__URXD1>, + <PIN_PD3__UTXD1>; + bias-disable; + u-boot,dm-pre-reloc; + };
- pinctrl_i2c0_default: i2c0_default { - pinmux = <PIN_PD21__TWD0>, - <PIN_PD22__TWCK0>; - bias-disable; - }; + pinctrl_i2c0_default: i2c0_default { + pinmux = <PIN_PD21__TWD0>, + <PIN_PD22__TWCK0>; + bias-disable; + };
- pinctrl_i2c1_default: i2c1_default { - pinmux = <PIN_PD4__TWD1>, - <PIN_PD5__TWCK1>; - bias-disable; - }; + pinctrl_i2c1_default: i2c1_default { + pinmux = <PIN_PD4__TWD1>, + <PIN_PD5__TWCK1>; + bias-disable; + };
- pinctrl_usb_default: usb_default { - pinmux = <PIN_PB10__GPIO>; - bias-disable; - }; + pinctrl_usb_default: usb_default { + pinmux = <PIN_PB10__GPIO>; + bias-disable; + };
- pinctrl_usba_vbus: usba_vbus { - pinmux = <PIN_PA31__GPIO>; - bias-disable; - }; + pinctrl_usba_vbus: usba_vbus { + pinmux = <PIN_PA31__GPIO>; + bias-disable; }; }; }; diff --git a/arch/arm/dts/at91-sama5d27_som1_ek.dts b/arch/arm/dts/at91-sama5d27_som1_ek.dts index efd1a5d197..70d15c8a62 100644 --- a/arch/arm/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/dts/at91-sama5d27_som1_ek.dts @@ -83,7 +83,7 @@ sdmmc0: sdio-host@a0000000 { bus-width = <8>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>; + pinctrl-0 = <&pinctrl_sdmmc0_default>; status = "okay"; u-boot,dm-pre-reloc; }; @@ -91,7 +91,7 @@ sdmmc1: sdio-host@b0000000 { bus-width = <4>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>; + pinctrl-0 = <&pinctrl_sdmmc1_default>; status = "okay"; /* conflict with qspi0 */ u-boot,dm-pre-reloc; }; @@ -129,7 +129,7 @@ u-boot,dm-pre-reloc; };
- pioA: gpio@fc038000 { + pioA: pinctrl@fc038000 { pinctrl { pinctrl_lcd_base: pinctrl_lcd_base { pinmux = <PIN_PC5__LCDVSYNC>, @@ -166,43 +166,47 @@ bias-disable; };
- pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default { - pinmux = <PIN_PA1__SDMMC0_CMD>, - <PIN_PA2__SDMMC0_DAT0>, - <PIN_PA3__SDMMC0_DAT1>, - <PIN_PA4__SDMMC0_DAT2>, - <PIN_PA5__SDMMC0_DAT3>, - <PIN_PA6__SDMMC0_DAT4>, - <PIN_PA7__SDMMC0_DAT5>, - <PIN_PA8__SDMMC0_DAT6>, - <PIN_PA9__SDMMC0_DAT7>; - bias-pull-up; - u-boot,dm-pre-reloc; - }; - - pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default { - pinmux = <PIN_PA0__SDMMC0_CK>, - <PIN_PA10__SDMMC0_RSTN>, - <PIN_PA13__SDMMC0_CD>; - bias-disable; - u-boot,dm-pre-reloc; + pinctrl_sdmmc0_default: sdmmc0_default { + cmd_dat { + pinmux = <PIN_PA1__SDMMC0_CMD>, + <PIN_PA2__SDMMC0_DAT0>, + <PIN_PA3__SDMMC0_DAT1>, + <PIN_PA4__SDMMC0_DAT2>, + <PIN_PA5__SDMMC0_DAT3>, + <PIN_PA6__SDMMC0_DAT4>, + <PIN_PA7__SDMMC0_DAT5>, + <PIN_PA8__SDMMC0_DAT6>, + <PIN_PA9__SDMMC0_DAT7>; + bias-pull-up; + u-boot,dm-pre-reloc; + }; + + ck_cd { + pinmux = <PIN_PA0__SDMMC0_CK>, + <PIN_PA10__SDMMC0_RSTN>, + <PIN_PA13__SDMMC0_CD>; + bias-disable; + u-boot,dm-pre-reloc; + }; };
- pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default { - pinmux = <PIN_PA28__SDMMC1_CMD>, - <PIN_PA18__SDMMC1_DAT0>, - <PIN_PA19__SDMMC1_DAT1>, - <PIN_PA20__SDMMC1_DAT2>, - <PIN_PA21__SDMMC1_DAT3>; - bias-pull-up; - u-boot,dm-pre-reloc; - }; - - pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default { - pinmux = <PIN_PA22__SDMMC1_CK>, - <PIN_PA30__SDMMC1_CD>; - bias-disable; - u-boot,dm-pre-reloc; + pinctrl_sdmmc1_default: sdmmc1_default { + cmd_dat { + pinmux = <PIN_PA28__SDMMC1_CMD>, + <PIN_PA18__SDMMC1_DAT0>, + <PIN_PA19__SDMMC1_DAT1>, + <PIN_PA20__SDMMC1_DAT2>, + <PIN_PA21__SDMMC1_DAT3>; + bias-pull-up; + u-boot,dm-pre-reloc; + }; + + ck_cd { + pinmux = <PIN_PA22__SDMMC1_CK>, + <PIN_PA30__SDMMC1_CD>; + bias-disable; + u-boot,dm-pre-reloc; + }; };
pinctrl_uart1_default: uart1_default { diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi b/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi index 8c84dd08fd..41cf9061a1 100644 --- a/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi +++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi @@ -37,11 +37,7 @@ u-boot,dm-pre-reloc; };
-&pinctrl_sdmmc0_cmd_dat_default { - u-boot,dm-pre-reloc; -}; - -&pinctrl_sdmmc0_ck_cd_default { +&pinctrl_sdmmc0_default { u-boot,dm-pre-reloc; };
diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts index f3f6942143..eec183d5de 100644 --- a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts +++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts @@ -34,7 +34,7 @@ sdmmc0: sdio-host@a0000000 { bus-width = <4>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>; + pinctrl-0 = <&pinctrl_sdmmc0_default>; status = "okay"; };
@@ -78,44 +78,44 @@ status = "okay"; };
- pioA: gpio@fc038000 { - pinctrl { - pinctrl_lcd_base: pinctrl_lcd_base { - pinmux = <PIN_PC30__LCDVSYNC>, - <PIN_PC31__LCDHSYNC>, - <PIN_PD1__LCDDEN>, - <PIN_PD0__LCDPCK>; - bias-disable; - }; + pioA: pinctrl@fc038000 { + pinctrl_lcd_base: pinctrl_lcd_base { + pinmux = <PIN_PC30__LCDVSYNC>, + <PIN_PC31__LCDHSYNC>, + <PIN_PD1__LCDDEN>, + <PIN_PD0__LCDPCK>; + bias-disable; + };
- pinctrl_lcd_pwm: pinctrl_lcd_pwm { - pinmux = <PIN_PC28__LCDPWM>; - bias-disable; - }; + pinctrl_lcd_pwm: pinctrl_lcd_pwm { + pinmux = <PIN_PC28__LCDPWM>; + bias-disable; + };
- pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 { - pinmux = <PIN_PC10__LCDDAT2>, - <PIN_PC11__LCDDAT3>, - <PIN_PC12__LCDDAT4>, - <PIN_PC13__LCDDAT5>, - <PIN_PC14__LCDDAT6>, - <PIN_PC15__LCDDAT7>, - <PIN_PC16__LCDDAT10>, - <PIN_PC17__LCDDAT11>, - <PIN_PC18__LCDDAT12>, - <PIN_PC19__LCDDAT13>, - <PIN_PC20__LCDDAT14>, - <PIN_PC21__LCDDAT15>, - <PIN_PC22__LCDDAT18>, - <PIN_PC23__LCDDAT19>, - <PIN_PC24__LCDDAT20>, - <PIN_PC25__LCDDAT21>, - <PIN_PC26__LCDDAT22>, - <PIN_PC27__LCDDAT23>; - bias-disable; - }; + pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 { + pinmux = <PIN_PC10__LCDDAT2>, + <PIN_PC11__LCDDAT3>, + <PIN_PC12__LCDDAT4>, + <PIN_PC13__LCDDAT5>, + <PIN_PC14__LCDDAT6>, + <PIN_PC15__LCDDAT7>, + <PIN_PC16__LCDDAT10>, + <PIN_PC17__LCDDAT11>, + <PIN_PC18__LCDDAT12>, + <PIN_PC19__LCDDAT13>, + <PIN_PC20__LCDDAT14>, + <PIN_PC21__LCDDAT15>, + <PIN_PC22__LCDDAT18>, + <PIN_PC23__LCDDAT19>, + <PIN_PC24__LCDDAT20>, + <PIN_PC25__LCDDAT21>, + <PIN_PC26__LCDDAT22>, + <PIN_PC27__LCDDAT23>; + bias-disable; + };
- pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default { + pinctrl_sdmmc0_default: sdmmc0_default { + cmd_data { pinmux = <PIN_PA1__SDMMC0_CMD>, <PIN_PA2__SDMMC0_DAT0>, <PIN_PA3__SDMMC0_DAT1>, @@ -124,24 +124,24 @@ bias-disable; };
- pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default { + ck_cd_vddsel { pinmux = <PIN_PA0__SDMMC0_CK>, <PIN_PA11__SDMMC0_VDDSEL>, <PIN_PA12__SDMMC0_WP>, <PIN_PA13__SDMMC0_CD>; bias-disable; }; + };
- pinctrl_uart0_default: uart0_default { - pinmux = <PIN_PB26__URXD0>, - <PIN_PB27__UTXD0>; - bias-disable; - }; + pinctrl_uart0_default: uart0_default { + pinmux = <PIN_PB26__URXD0>, + <PIN_PB27__UTXD0>; + bias-disable; + };
- pinctrl_onewire_tm_default: onewire_tm_default { - pinmux = <PIN_PC9__GPIO>; - bias-pull-up; - }; + pinctrl_onewire_tm_default: onewire_tm_default { + pinmux = <PIN_PC9__GPIO>; + bias-pull-up; }; }; }; diff --git a/arch/arm/dts/at91-sama5d2_icp.dts b/arch/arm/dts/at91-sama5d2_icp.dts index 0b0db1b2be..2dffae9c5c 100644 --- a/arch/arm/dts/at91-sama5d2_icp.dts +++ b/arch/arm/dts/at91-sama5d2_icp.dts @@ -86,75 +86,73 @@ }; };
- pioA: gpio@fc038000 { + pioA: pinctrl@fc038000 { status = "okay"; - pinctrl { - pinctrl_i2c1_default: i2c1_default { - pinmux = <PIN_PD19__TWD1>, - <PIN_PD20__TWCK1>; - bias-disable; - }; - - pinctrl_macb0_rmii: macb0_rmii { - pinmux = <PIN_PD1__GRXCK>, - <PIN_PD2__GTXER>, - <PIN_PD5__GRX2>, - <PIN_PD6__GRX3>, - <PIN_PD7__GTX2>, - <PIN_PD8__GTX3>, - <PIN_PD9__GTXCK>, - <PIN_PD10__GTXEN>, - <PIN_PD11__GRXDV>, - <PIN_PD12__GRXER>, - <PIN_PD13__GRX0>, - <PIN_PD14__GRX1>, - <PIN_PD15__GTX0>, - <PIN_PD16__GTX1>, - <PIN_PD17__GMDC>, - <PIN_PD18__GMDIO>; - bias-disable; - }; - - pinctrl_macb0_phy_irq: macb0_phy_irq { - pinmux = <PIN_PD3__GPIO>; - bias-disable; - }; - - pinctrl_macb0_rst: macb0_sw_rst { - pinmux = <PIN_PD4__GPIO>; - bias-pull-up; - }; - - pinctrl_mikrobus1_uart: mikrobus1_uart { - pinmux = <PIN_PB26__URXD0>, - <PIN_PB27__UTXD0>; - bias-disable; - }; - - pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default { - pinmux = <PIN_PA6__QSPI1_SCK>, - <PIN_PA11__QSPI1_CS>; - bias-disable; - }; - - pinctrl_qspi1_dat_default: qspi1_dat_default { - pinmux = <PIN_PA7__QSPI1_IO0>, - <PIN_PA8__QSPI1_IO1>, - <PIN_PA9__QSPI1_IO2>, - <PIN_PA10__QSPI1_IO3>; - bias-pull-up; - }; - - pinctrl_sdmmc0_default: sdmmc0_default { - pinmux = <PIN_PA1__SDMMC0_CMD>, - <PIN_PA2__SDMMC0_DAT0>, - <PIN_PA3__SDMMC0_DAT1>, - <PIN_PA4__SDMMC0_DAT2>, - <PIN_PA5__SDMMC0_DAT3>, - <PIN_PA0__SDMMC0_CK>, - <PIN_PA13__SDMMC0_CD>; - bias-disable; - }; + pinctrl_i2c1_default: i2c1_default { + pinmux = <PIN_PD19__TWD1>, + <PIN_PD20__TWCK1>; + bias-disable; + }; + + pinctrl_macb0_rmii: macb0_rmii { + pinmux = <PIN_PD1__GRXCK>, + <PIN_PD2__GTXER>, + <PIN_PD5__GRX2>, + <PIN_PD6__GRX3>, + <PIN_PD7__GTX2>, + <PIN_PD8__GTX3>, + <PIN_PD9__GTXCK>, + <PIN_PD10__GTXEN>, + <PIN_PD11__GRXDV>, + <PIN_PD12__GRXER>, + <PIN_PD13__GRX0>, + <PIN_PD14__GRX1>, + <PIN_PD15__GTX0>, + <PIN_PD16__GTX1>, + <PIN_PD17__GMDC>, + <PIN_PD18__GMDIO>; + bias-disable; + }; + + pinctrl_macb0_phy_irq: macb0_phy_irq { + pinmux = <PIN_PD3__GPIO>; + bias-disable; + }; + + pinctrl_macb0_rst: macb0_sw_rst { + pinmux = <PIN_PD4__GPIO>; + bias-pull-up; + }; + + pinctrl_mikrobus1_uart: mikrobus1_uart { + pinmux = <PIN_PB26__URXD0>, + <PIN_PB27__UTXD0>; + bias-disable; + }; + + pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default { + pinmux = <PIN_PA6__QSPI1_SCK>, + <PIN_PA11__QSPI1_CS>; + bias-disable; + }; + + pinctrl_qspi1_dat_default: qspi1_dat_default { + pinmux = <PIN_PA7__QSPI1_IO0>, + <PIN_PA8__QSPI1_IO1>, + <PIN_PA9__QSPI1_IO2>, + <PIN_PA10__QSPI1_IO3>; + bias-pull-up; + }; + + pinctrl_sdmmc0_default: sdmmc0_default { + pinmux = <PIN_PA1__SDMMC0_CMD>, + <PIN_PA2__SDMMC0_DAT0>, + <PIN_PA3__SDMMC0_DAT1>, + <PIN_PA4__SDMMC0_DAT2>, + <PIN_PA5__SDMMC0_DAT3>, + <PIN_PA0__SDMMC0_CK>, + <PIN_PA13__SDMMC0_CD>; + bias-disable; }; }; }; diff --git a/arch/arm/dts/at91-sama5d2_ptc_ek.dts b/arch/arm/dts/at91-sama5d2_ptc_ek.dts index f45fb1ef26..36d52c2c5e 100644 --- a/arch/arm/dts/at91-sama5d2_ptc_ek.dts +++ b/arch/arm/dts/at91-sama5d2_ptc_ek.dts @@ -94,7 +94,7 @@ sdmmc0: sdio-host@a0000000 { bus-width = <8>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>; + pinctrl-0 = <&pinctrl_sdmmc0_default>; status = "okay"; u-boot,dm-pre-reloc; }; @@ -102,7 +102,7 @@ sdmmc1: sdio-host@b0000000 { bus-width = <4>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>; + pinctrl-0 = <&pinctrl_sdmmc1_default>; status = "disabled"; /* conflicts with nand and qspi0*/ u-boot,dm-pre-reloc; }; @@ -137,34 +137,34 @@ }; };
- pioA: gpio@fc038000 { - pinctrl { - pinctrl_i2c1_default: i2c1_default { - pinmux = <PIN_PC6__TWD1>, - <PIN_PC7__TWCK1>; - bias-disable; - }; + pioA: pinctrl@fc038000 { + pinctrl_i2c1_default: i2c1_default { + pinmux = <PIN_PC6__TWD1>, + <PIN_PC7__TWCK1>; + bias-disable; + };
- pinctrl_macb0_phy_irq: macb0_phy_irq { - pinmux = <PIN_PB24__GPIO>; - bias-disable; - }; + pinctrl_macb0_phy_irq: macb0_phy_irq { + pinmux = <PIN_PB24__GPIO>; + bias-disable; + };
- pinctrl_macb0_rmii: macb0_rmii { - pinmux = <PIN_PB14__GTXCK>, - <PIN_PB15__GTXEN>, - <PIN_PB16__GRXDV>, - <PIN_PB17__GRXER>, - <PIN_PB18__GRX0>, - <PIN_PB19__GRX1>, - <PIN_PB20__GTX0>, - <PIN_PB21__GTX1>, - <PIN_PB22__GMDC>, - <PIN_PB23__GMDIO>; - bias-disable; - }; + pinctrl_macb0_rmii: macb0_rmii { + pinmux = <PIN_PB14__GTXCK>, + <PIN_PB15__GTXEN>, + <PIN_PB16__GRXDV>, + <PIN_PB17__GRXER>, + <PIN_PB18__GRX0>, + <PIN_PB19__GRX1>, + <PIN_PB20__GTX0>, + <PIN_PB21__GTX1>, + <PIN_PB22__GMDC>, + <PIN_PB23__GMDIO>; + bias-disable; + };
- pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default { + pinctrl_sdmmc0_default: sdmmc0_default { + cmd_dat { pinmux = <PIN_PA1__SDMMC0_CMD>, <PIN_PA2__SDMMC0_DAT0>, <PIN_PA3__SDMMC0_DAT1>, @@ -178,7 +178,7 @@ u-boot,dm-pre-reloc; };
- pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default { + ck_cd { pinmux = <PIN_PA0__SDMMC0_CK>, <PIN_PA10__SDMMC0_RSTN>, <PIN_PA11__SDMMC0_VDDSEL>, @@ -186,8 +186,10 @@ bias-disable; u-boot,dm-pre-reloc; }; + };
- pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default { + pinctrl_sdmmc1_default: sdmmc1_default { + cmd_dat { pinmux = <PIN_PA28__SDMMC1_CMD>, <PIN_PA18__SDMMC1_DAT0>, <PIN_PA19__SDMMC1_DAT1>, @@ -197,34 +199,34 @@ u-boot,dm-pre-reloc; };
- pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default { + ck_cd { pinmux = <PIN_PA22__SDMMC1_CK>, <PIN_PA30__SDMMC1_CD>; bias-disable; u-boot,dm-pre-reloc; }; + };
- pinctrl_uart0_default: uart0_default { - pinmux = <PIN_PB26__URXD0>, - <PIN_PB27__UTXD0>; - bias-disable; - u-boot,dm-pre-reloc; - }; + pinctrl_uart0_default: uart0_default { + pinmux = <PIN_PB26__URXD0>, + <PIN_PB27__UTXD0>; + bias-disable; + u-boot,dm-pre-reloc; + };
- pinctrl_usb_default: usb_default { - pinmux = <PIN_PB12__GPIO>; - bias-disable; - }; + pinctrl_usb_default: usb_default { + pinmux = <PIN_PB12__GPIO>; + bias-disable; + };
- pinctrl_usba_vbus: usba_vbus { - pinmux = <PIN_PB11__GPIO>; - bias-disable; - }; + pinctrl_usba_vbus: usba_vbus { + pinmux = <PIN_PB11__GPIO>; + bias-disable; + };
- pinctrl_onewire_tm_default: onewire_tm_default { - pinmux = <PIN_PB31__GPIO>; - bias-pull-up; - }; + pinctrl_onewire_tm_default: onewire_tm_default { + pinmux = <PIN_PB31__GPIO>; + bias-pull-up; }; }; }; diff --git a/arch/arm/dts/at91-sama5d2_xplained.dts b/arch/arm/dts/at91-sama5d2_xplained.dts index 34b64a22af..78a3a851bb 100644 --- a/arch/arm/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/dts/at91-sama5d2_xplained.dts @@ -44,7 +44,7 @@ sdmmc0: sdio-host@a0000000 { bus-width = <8>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>; + pinctrl-0 = <&pinctrl_sdmmc0_default>; status = "okay"; u-boot,dm-pre-reloc; }; @@ -52,7 +52,7 @@ sdmmc1: sdio-host@b0000000 { bus-width = <4>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>; + pinctrl-0 = <&pinctrl_sdmmc1_default>; status = "okay"; /* conflict with qspi0 */ u-boot,dm-pre-reloc; }; @@ -143,85 +143,85 @@ }; };
- pioA: gpio@fc038000 { - pinctrl { - pinctrl_i2c1_default: i2c1_default { - pinmux = <PIN_PD4__TWD1>, - <PIN_PD5__TWCK1>; - bias-disable; - }; + pioA: pinctrl@fc038000 { + pinctrl_i2c1_default: i2c1_default { + pinmux = <PIN_PD4__TWD1>, + <PIN_PD5__TWCK1>; + bias-disable; + };
- pinctrl_lcd_base: pinctrl_lcd_base { - pinmux = <PIN_PC30__LCDVSYNC>, - <PIN_PC31__LCDHSYNC>, - <PIN_PD1__LCDDEN>, - <PIN_PD0__LCDPCK>; - bias-disable; - }; + pinctrl_lcd_base: pinctrl_lcd_base { + pinmux = <PIN_PC30__LCDVSYNC>, + <PIN_PC31__LCDHSYNC>, + <PIN_PD1__LCDDEN>, + <PIN_PD0__LCDPCK>; + bias-disable; + };
- pinctrl_lcd_pwm: pinctrl_lcd_pwm { - pinmux = <PIN_PC28__LCDPWM>; - bias-disable; - }; + pinctrl_lcd_pwm: pinctrl_lcd_pwm { + pinmux = <PIN_PC28__LCDPWM>; + bias-disable; + };
- pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 { - pinmux = <PIN_PC10__LCDDAT2>, - <PIN_PC11__LCDDAT3>, - <PIN_PC12__LCDDAT4>, - <PIN_PC13__LCDDAT5>, - <PIN_PC14__LCDDAT6>, - <PIN_PC15__LCDDAT7>, - <PIN_PC16__LCDDAT10>, - <PIN_PC17__LCDDAT11>, - <PIN_PC18__LCDDAT12>, - <PIN_PC19__LCDDAT13>, - <PIN_PC20__LCDDAT14>, - <PIN_PC21__LCDDAT15>, - <PIN_PC22__LCDDAT18>, - <PIN_PC23__LCDDAT19>, - <PIN_PC24__LCDDAT20>, - <PIN_PC25__LCDDAT21>, - <PIN_PC26__LCDDAT22>, - <PIN_PC27__LCDDAT23>; - bias-disable; - }; + pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 { + pinmux = <PIN_PC10__LCDDAT2>, + <PIN_PC11__LCDDAT3>, + <PIN_PC12__LCDDAT4>, + <PIN_PC13__LCDDAT5>, + <PIN_PC14__LCDDAT6>, + <PIN_PC15__LCDDAT7>, + <PIN_PC16__LCDDAT10>, + <PIN_PC17__LCDDAT11>, + <PIN_PC18__LCDDAT12>, + <PIN_PC19__LCDDAT13>, + <PIN_PC20__LCDDAT14>, + <PIN_PC21__LCDDAT15>, + <PIN_PC22__LCDDAT18>, + <PIN_PC23__LCDDAT19>, + <PIN_PC24__LCDDAT20>, + <PIN_PC25__LCDDAT21>, + <PIN_PC26__LCDDAT22>, + <PIN_PC27__LCDDAT23>; + bias-disable; + };
- pinctrl_macb0_phy_irq: macb0_phy_irq { - pinmux = <PIN_PC9__GPIO>; - bias-disable; - }; + pinctrl_macb0_phy_irq: macb0_phy_irq { + pinmux = <PIN_PC9__GPIO>; + bias-disable; + };
- pinctrl_macb0_rmii: macb0_rmii { - pinmux = <PIN_PB14__GTXCK>, - <PIN_PB15__GTXEN>, - <PIN_PB16__GRXDV>, - <PIN_PB17__GRXER>, - <PIN_PB18__GRX0>, - <PIN_PB19__GRX1>, - <PIN_PB20__GTX0>, - <PIN_PB21__GTX1>, - <PIN_PB22__GMDC>, - <PIN_PB23__GMDIO>; - bias-disable; - }; + pinctrl_macb0_rmii: macb0_rmii { + pinmux = <PIN_PB14__GTXCK>, + <PIN_PB15__GTXEN>, + <PIN_PB16__GRXDV>, + <PIN_PB17__GRXER>, + <PIN_PB18__GRX0>, + <PIN_PB19__GRX1>, + <PIN_PB20__GTX0>, + <PIN_PB21__GTX1>, + <PIN_PB22__GMDC>, + <PIN_PB23__GMDIO>; + bias-disable; + };
- pinctrl_qspi0_sck_cs_default: qspi0_sck_cs_default { - pinmux = <PIN_PA22__QSPI0_SCK>, - <PIN_PA23__QSPI0_CS>; - bias-disable; - u-boot,dm-pre-reloc; - }; + pinctrl_qspi0_sck_cs_default: qspi0_sck_cs_default { + pinmux = <PIN_PA22__QSPI0_SCK>, + <PIN_PA23__QSPI0_CS>; + bias-disable; + u-boot,dm-pre-reloc; + };
- pinctrl_qspi0_dat_default: qspi0_dat_default { - pinmux = <PIN_PA24__QSPI0_IO0>, - <PIN_PA25__QSPI0_IO1>, - <PIN_PA26__QSPI0_IO2>, - <PIN_PA27__QSPI0_IO3>; - bias-pull-up; - u-boot,dm-pre-reloc; - }; + pinctrl_qspi0_dat_default: qspi0_dat_default { + pinmux = <PIN_PA24__QSPI0_IO0>, + <PIN_PA25__QSPI0_IO1>, + <PIN_PA26__QSPI0_IO2>, + <PIN_PA27__QSPI0_IO3>; + bias-pull-up; + u-boot,dm-pre-reloc; + };
- pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default { + pinctrl_sdmmc0_default: sdmmc0_default { + cmd_dat { pinmux = <PIN_PA1__SDMMC0_CMD>, <PIN_PA2__SDMMC0_DAT0>, <PIN_PA3__SDMMC0_DAT1>, @@ -235,7 +235,7 @@ u-boot,dm-pre-reloc; };
- pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default { + ck_cd_default { pinmux = <PIN_PA0__SDMMC0_CK>, <PIN_PA10__SDMMC0_RSTN>, <PIN_PA11__SDMMC0_VDDSEL>, @@ -243,8 +243,10 @@ bias-disable; u-boot,dm-pre-reloc; }; + };
- pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default { + pinctrl_sdmmc1_default: sdmmc1_default { + cmd_dat { pinmux = <PIN_PA28__SDMMC1_CMD>, <PIN_PA18__SDMMC1_DAT0>, <PIN_PA19__SDMMC1_DAT1>, @@ -254,42 +256,42 @@ u-boot,dm-pre-reloc; };
- pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default { + ck_cd { pinmux = <PIN_PA22__SDMMC1_CK>, <PIN_PA30__SDMMC1_CD>; bias-disable; u-boot,dm-pre-reloc; }; + };
- pinctrl_spi0_default: spi0_default { - pinmux = <PIN_PA14__SPI0_SPCK>, - <PIN_PA15__SPI0_MOSI>, - <PIN_PA16__SPI0_MISO>; - bias-disable; - u-boot,dm-pre-reloc; - }; + pinctrl_spi0_default: spi0_default { + pinmux = <PIN_PA14__SPI0_SPCK>, + <PIN_PA15__SPI0_MOSI>, + <PIN_PA16__SPI0_MISO>; + bias-disable; + u-boot,dm-pre-reloc; + };
- pinctrl_uart1_default: uart1_default { - pinmux = <PIN_PD2__URXD1>, - <PIN_PD3__UTXD1>; - bias-disable; - u-boot,dm-pre-reloc; - }; + pinctrl_uart1_default: uart1_default { + pinmux = <PIN_PD2__URXD1>, + <PIN_PD3__UTXD1>; + bias-disable; + u-boot,dm-pre-reloc; + };
- pinctrl_usb_default: usb_default { - pinmux = <PIN_PB10__GPIO>; - bias-disable; - }; + pinctrl_usb_default: usb_default { + pinmux = <PIN_PB10__GPIO>; + bias-disable; + };
- pinctrl_usba_vbus: usba_vbus { - pinmux = <PIN_PA31__GPIO>; - bias-disable; - }; + pinctrl_usba_vbus: usba_vbus { + pinmux = <PIN_PA31__GPIO>; + bias-disable; + };
- pinctrl_onewire_tm_default: onewire_tm_default { - pinmux = <PIN_PB0__GPIO>; - bias-pull-up; - }; + pinctrl_onewire_tm_default: onewire_tm_default { + pinmux = <PIN_PB0__GPIO>; + bias-pull-up; }; }; }; diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi index d92bdd5588..790b746ed1 100644 --- a/arch/arm/dts/sama5d2.dtsi +++ b/arch/arm/dts/sama5d2.dtsi @@ -799,18 +799,13 @@ status = "disabled"; };
- pioA: gpio@fc038000 { - compatible = "atmel,sama5d2-gpio"; + pioA: pinctrl@fc038000 { + compatible = "atmel,sama5d2-pinctrl"; reg = <0xfc038000 0x600>; clocks = <&pioA_clk>; gpio-controller; #gpio-cells = <2>; u-boot,dm-pre-reloc; - - pinctrl { - compatible = "atmel,sama5d2-pinctrl"; - u-boot,dm-pre-reloc; - }; }; }; }; diff --git a/arch/arm/dts/sama5d27_som1.dtsi b/arch/arm/dts/sama5d27_som1.dtsi index db4fefadcd..f920077449 100644 --- a/arch/arm/dts/sama5d27_som1.dtsi +++ b/arch/arm/dts/sama5d27_som1.dtsi @@ -103,54 +103,52 @@ status = "okay"; };
- pioA: gpio@fc038000 { - pinctrl { - pinctrl_i2c0_default: i2c0_default { - pinmux = <PIN_PD21__TWD0>, - <PIN_PD22__TWCK0>; - bias-disable; - }; - - pinctrl_i2c1_default: i2c1_default { - pinmux = <PIN_PD4__TWD1>, - <PIN_PD5__TWCK1>; - bias-disable; - }; - - pinctrl_macb0_phy_irq: macb0_phy_irq { - pinmux = <PIN_PD31__GPIO>; - bias-disable; - }; - - pinctrl_macb0_rmii: macb0_rmii { - pinmux = <PIN_PD9__GTXCK>, - <PIN_PD10__GTXEN>, - <PIN_PD11__GRXDV>, - <PIN_PD12__GRXER>, - <PIN_PD13__GRX0>, - <PIN_PD14__GRX1>, - <PIN_PD15__GTX0>, - <PIN_PD16__GTX1>, - <PIN_PD17__GMDC>, - <PIN_PD18__GMDIO>; - bias-disable; - }; - - pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default { - pinmux = <PIN_PB5__QSPI1_SCK>, - <PIN_PB6__QSPI1_CS>; - bias-disable; - u-boot,dm-pre-reloc; - }; - - pinctrl_qspi1_dat_default: qspi1_dat_default { - pinmux = <PIN_PB7__QSPI1_IO0>, - <PIN_PB8__QSPI1_IO1>, - <PIN_PB9__QSPI1_IO2>, - <PIN_PB10__QSPI1_IO3>; - bias-pull-up; - u-boot,dm-pre-reloc; - }; + pioA: pinctrl@fc038000 { + pinctrl_i2c0_default: i2c0_default { + pinmux = <PIN_PD21__TWD0>, + <PIN_PD22__TWCK0>; + bias-disable; + }; + + pinctrl_i2c1_default: i2c1_default { + pinmux = <PIN_PD4__TWD1>, + <PIN_PD5__TWCK1>; + bias-disable; + }; + + pinctrl_macb0_phy_irq: macb0_phy_irq { + pinmux = <PIN_PD31__GPIO>; + bias-disable; + }; + + pinctrl_macb0_rmii: macb0_rmii { + pinmux = <PIN_PD9__GTXCK>, + <PIN_PD10__GTXEN>, + <PIN_PD11__GRXDV>, + <PIN_PD12__GRXER>, + <PIN_PD13__GRX0>, + <PIN_PD14__GRX1>, + <PIN_PD15__GTX0>, + <PIN_PD16__GTX1>, + <PIN_PD17__GMDC>, + <PIN_PD18__GMDIO>; + bias-disable; + }; + + pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default { + pinmux = <PIN_PB5__QSPI1_SCK>, + <PIN_PB6__QSPI1_CS>; + bias-disable; + u-boot,dm-pre-reloc; + }; + + pinctrl_qspi1_dat_default: qspi1_dat_default { + pinmux = <PIN_PB7__QSPI1_IO0>, + <PIN_PB8__QSPI1_IO1>, + <PIN_PB9__QSPI1_IO2>, + <PIN_PB10__QSPI1_IO3>; + bias-pull-up; + u-boot,dm-pre-reloc; }; }; }; diff --git a/arch/arm/dts/sama5d27_wlsom1.dtsi b/arch/arm/dts/sama5d27_wlsom1.dtsi index 889a0034d1..1c23b8c737 100644 --- a/arch/arm/dts/sama5d27_wlsom1.dtsi +++ b/arch/arm/dts/sama5d27_wlsom1.dtsi @@ -41,36 +41,34 @@ }; };
- pioA: gpio@fc038000 { - pinctrl { - pinctrl_macb0_phy_irq: macb0_phy_irq { - pinmux = <PIN_PB24__GPIO>; - bias-disable; - }; + pioA: pinctrl@fc038000 { + pinctrl_macb0_phy_irq: macb0_phy_irq { + pinmux = <PIN_PB24__GPIO>; + bias-disable; + };
- pinctrl_macb0_rmii: macb0_rmii { - pinmux = <PIN_PB14__GTXCK>, - <PIN_PB15__GTXEN>, - <PIN_PB16__GRXDV>, - <PIN_PB17__GRXER>, - <PIN_PB18__GRX0>, - <PIN_PB19__GRX1>, - <PIN_PB20__GTX0>, - <PIN_PB21__GTX1>, - <PIN_PB22__GMDC>, - <PIN_PB23__GMDIO>; - bias-disable; - }; + pinctrl_macb0_rmii: macb0_rmii { + pinmux = <PIN_PB14__GTXCK>, + <PIN_PB15__GTXEN>, + <PIN_PB16__GRXDV>, + <PIN_PB17__GRXER>, + <PIN_PB18__GRX0>, + <PIN_PB19__GRX1>, + <PIN_PB20__GTX0>, + <PIN_PB21__GTX1>, + <PIN_PB22__GMDC>, + <PIN_PB23__GMDIO>; + bias-disable; + };
- pinctrl_qspi1_default: qspi1_default { - pinmux = <PIN_PB5__QSPI1_SCK>, - <PIN_PB6__QSPI1_CS>, - <PIN_PB7__QSPI1_IO0>, - <PIN_PB8__QSPI1_IO1>, - <PIN_PB9__QSPI1_IO2>, - <PIN_PB10__QSPI1_IO3>; - bias-pull-up; - }; + pinctrl_qspi1_default: qspi1_default { + pinmux = <PIN_PB5__QSPI1_SCK>, + <PIN_PB6__QSPI1_CS>, + <PIN_PB7__QSPI1_IO0>, + <PIN_PB8__QSPI1_IO1>, + <PIN_PB9__QSPI1_IO2>, + <PIN_PB10__QSPI1_IO3>; + bias-pull-up; }; }; };