
On 27.07.22 14:47, Pali Rohár wrote:
- Add SPDX-License-Identifier
- Add SFP and LED nodes
- Fix PHY nad NOR nodes
- Remove duplicates from u-boot.dtsi file
Signed-off-by: Pali Rohár pali@kernel.org
Applied to u-boot-marvell/master
Thanks, Stefan
.../dts/armada-385-turris-omnia-u-boot.dtsi | 5 +- arch/arm/dts/armada-385-turris-omnia.dts | 228 ++++++++++++++---- 2 files changed, 183 insertions(+), 50 deletions(-)
diff --git a/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi b/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi index 5a22cc64a1a5..ec12298fd40c 100644 --- a/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi +++ b/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi @@ -28,11 +28,8 @@ i2c@5 { u-boot,dm-pre-reloc;
/* ATSHA204A at address 0x64 */ crypto@64 { u-boot,dm-pre-reloc;
compatible = "atmel,atsha204a";
}; };reg = <0x64>; };
@@ -42,7 +39,7 @@ &spi0 { u-boot,dm-pre-reloc;
- spi-nor@0 {
flash@0 { u-boot,dm-pre-reloc;
partitions {
diff --git a/arch/arm/dts/armada-385-turris-omnia.dts b/arch/arm/dts/armada-385-turris-omnia.dts index fe5c0b1b5915..e213c64dca4f 100644 --- a/arch/arm/dts/armada-385-turris-omnia.dts +++ b/arch/arm/dts/armada-385-turris-omnia.dts @@ -1,43 +1,10 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /*
- Device Tree file for the Turris Omnia
- Copyright (C) 2016 Uwe Kleine-König uwe@kleine-koenig.org
- Copyright (C) 2016 Tomas Hlavacek tmshlvkc@gmail.com
- This file is dual-licensed: you can use it either under the terms
- of the GPL or the X11 license, at your option. Note that this dual
- licensing only applies to this file, and not this project as a
- whole.
- a) This file is licensed under the terms of the GNU General Public
License version 2. This program is licensed "as is" without
any warranty of any kind, whether express or implied.
- Or, alternatively,
- b) Permission is hereby granted, free of charge, to any person
obtaining a copy of this software and associated documentation
files (the "Software"), to deal in the Software without
restriction, including without limitation the rights to use,
copy, modify, merge, publish, distribute, sublicense, and/or
sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following
conditions:
The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
- */
-/*
- Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf
*/
@@ -45,6 +12,7 @@
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> #include "armada-385.dtsi"
/ { @@ -70,7 +38,8 @@ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
internal-regs {
@@ -108,19 +77,48 @@ pcie@1,0 { /* Port 0, Lane 0 */ status = "okay";
slot-power-limit-milliwatt = <10000>; }; pcie@2,0 { /* Port 1, Lane 0 */ status = "okay";
slot-power-limit-milliwatt = <10000>; }; pcie@3,0 { /* Port 2, Lane 0 */ status = "okay";
slot-power-limit-milliwatt = <10000>; };
}; };
sfp: sfp {
compatible = "sff,sfp";
i2c-bus = <&sfp_i2c>;
tx-fault-gpios = <&pcawan 0 GPIO_ACTIVE_HIGH>;
tx-disable-gpios = <&pcawan 1 GPIO_ACTIVE_HIGH>;
rate-select0-gpios = <&pcawan 2 GPIO_ACTIVE_HIGH>;
los-gpios = <&pcawan 3 GPIO_ACTIVE_HIGH>;
mod-def0-gpios = <&pcawan 4 GPIO_ACTIVE_LOW>;
maximum-power-milliwatt = <3000>;
/*
* For now this has to be enabled at boot time by U-Boot when
* a SFP module is present. Read more in the comment in the
* eth2 node below.
*/
status = "disabled";
};
+};
+&bm {
- status = "okay";
+};
+&bm_bppi {
status = "okay"; };
/* Connected to 88E6176 switch, port 6 */
@@ -129,6 +127,9 @@ pinctrl-0 = <&ge0_rgmii_pins>; status = "okay"; phy-mode = "rgmii";
buffer-manager = <&bm>;
bm,pool-long = <0>;
bm,pool-short = <3>;
fixed-link { speed = <1000>;
@@ -142,6 +143,9 @@ pinctrl-0 = <&ge1_rgmii_pins>; status = "okay"; phy-mode = "rgmii";
buffer-manager = <&bm>;
bm,pool-long = <1>;
bm,pool-short = <3>;
fixed-link { speed = <1000>;
@@ -151,9 +155,23 @@
/* WAN port */ ð2 {
- /*
* eth2 is connected via a multiplexor to both the SFP cage and to
* ethernet-phy@1. The multiplexor switches the signal to SFP cage when
* a SFP module is present, as determined by the mode-def0 GPIO.
*
* Until kernel supports this configuration properly, in case SFP module
* is present, U-Boot has to enable the sfp node above, remove phy
* handle and add managed = "in-band-status" property.
status = "okay"; phy-mode = "sgmii";*/
- phy = <&phy1>;
phy-handle = <&phy1>;
phys = <&comphy5 2>;
sfp = <&sfp>;
buffer-manager = <&bm>;
bm,pool-long = <2>;
bm,pool-short = <3>; };
&i2c0 {
@@ -166,7 +184,6 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x70>;
status = "okay";
i2c@0 { #address-cells = <1>;
@@ -180,10 +197,114 @@ gpio-controller; };
/* leds device (in STM32F0) at address 0x2b */
led-controller@2b {
compatible = "cznic,turris-omnia-leds";
reg = <0x2b>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
/*
* LEDs are controlled by MCU (STM32F0) at
* address 0x2b.
*
* LED functions are not stable yet:
* - there are 3 LEDs connected via MCU to PCIe
* ports. One of these ports supports mSATA.
* There is no mSATA nor PCIe function.
* For now we use LED_FUNCTION_WLAN, since
* in most cases users have wifi cards in
* these slots
* - there are 2 LEDs dedicated for user: A and
* B. Again there is no such function defined.
* For now we use LED_FUNCTION_INDICATOR
*/
multi-led@0 {
reg = <0x0>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_INDICATOR;
function-enumerator = <2>;
};
multi-led@1 {
reg = <0x1>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_INDICATOR;
function-enumerator = <1>;
};
multi-led@2 {
reg = <0x2>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_WLAN;
function-enumerator = <3>;
};
multi-led@3 {
reg = <0x3>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_WLAN;
function-enumerator = <2>;
};
multi-led@4 {
reg = <0x4>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_WLAN;
function-enumerator = <1>;
};
multi-led@5 {
reg = <0x5>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_WAN;
};
multi-led@6 {
reg = <0x6>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_LAN;
function-enumerator = <4>;
};
multi-led@7 {
reg = <0x7>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_LAN;
function-enumerator = <3>;
};
multi-led@8 {
reg = <0x8>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
};
multi-led@9 {
reg = <0x9>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
};
multi-led@a {
reg = <0xa>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_LAN;
function-enumerator = <0>;
};
multi-led@b {
reg = <0xb>;
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_POWER;
};
}; eeprom@54 {
compatible = "at,24c64";
compatible = "atmel,24c64"; reg = <0x54>; /* The EEPROM contains data for bootloader.
@@ -222,7 +343,7 @@ /* routed to PCIe2 connector (CN62A) */ };
i2c@4 {
sfp_i2c: i2c@4 { #address-cells = <1>; #size-cells = <0>; reg = <4>;
@@ -235,7 +356,11 @@ #size-cells = <0>; reg = <5>;
/* ATSHA204A at address 0x64 */
/* ATSHA204A-MAHDA-T crypto module */
crypto@64 {
compatible = "atmel,atsha204a";
reg = <0x64>;
};
};
i2c@6 {
@@ -277,23 +402,29 @@ pinctrl-0 = <&mdio_pins>; status = "okay";
- phy1: phy@1 {
status = "okay";
compatible = "ethernet-phy-id0141.0DD1", "ethernet-phy-ieee802.3-c22";
phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
marvell,reg-init = <3 18 0 0x4985>,
<3 16 0xfff0 0x0001>;
/* irq is connected to &pcawan pin 7 */ };
/* Switch MV88E6176 at address 0x10 */ switch@10 {
pinctrl-names = "default";
pinctrl-0 = <&swint_pins>;
compatible = "marvell,mv88e6085"; #address-cells = <1>; #size-cells = <0>;
dsa,member = <0 0>;
dsa,member = <0 0>;
reg = <0x10>;
interrupt-parent = <&gpio1>;
interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
ports { #address-cells = <1>; #size-cells = <0>;
@@ -346,6 +477,11 @@ marvell,function = "gpio"; };
- swint_pins: swint-pins {
marvell,pins = "mpp45";
marvell,function = "gpio";
- };
- spi0cs0_pins: spi0cs0-pins { marvell,pins = "mpp25"; marvell,function = "spi0";
@@ -362,7 +498,7 @@ pinctrl-0 = <&spi0_pins &spi0cs0_pins>; status = "okay";
- spi-nor@0 {
- flash@0 { compatible = "spansion,s25fl164k", "jedec,spi-nor"; #address-cells = <1>; #size-cells = <1>;
Viele Grüße, Stefan Roese