From: Christopher Obbard chris.obbard@collabora.com
Enable the pciE 2x1l 2 device and associated combphy. On this bus, the Rock5B has an Ethernet transceiver connected.
Signed-off-by: Christopher Obbard chris.obbard@collabora.com [eugen.hristev@collabora.com: minor tweaks] Signed-off-by: Eugen Hristev eugen.hristev@collabora.com --- arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi index 8a5b0ce42034..8293738407c4 100644 --- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi +++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi @@ -31,10 +31,21 @@ }; };
+&combphy0_ps { + status = "okay"; +}; + &fspim2_pins { bootph-all; };
+&pcie2x1l2 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_reset_h>; + reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + &sdmmc { bus-width = <4>; bootph-all; @@ -45,6 +56,12 @@ &pinctrl { bootph-all;
+ pcie { + pcie_reset_h: pcie-reset-h { + rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + usb { vcc5v0_host_en: vcc5v0-host-en { rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;