This patch adds a DM GPIO driver for the Marvell MVEBU SoCs. There are other non-DM drivers that might be used on these platforms. But this patch creates a new DM driver. Which will be used by all Armada XP/38x boards. Other MVEBU SoC (Kirkwood / Orion) may follow once they support DM as well.
Signed-off-by: Stefan Roese sr@denx.de Cc: Dirk Eibach dirk.eibach@gdsys.cc Cc: Phil Sutter phil@nwl.cc Cc: Kevin Smith kevin.smith@elecsyscorp.com Cc: Luka Perkov luka.perkov@sartura.hr Cc: Tom Rini trini@konsulko.com --- drivers/gpio/Kconfig | 7 +++ drivers/gpio/Makefile | 1 + drivers/gpio/mvebu_gpio.c | 119 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 127 insertions(+) create mode 100644 drivers/gpio/mvebu_gpio.c
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 845dc72..6147aa3 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -90,4 +90,11 @@ config PIC32_GPIO help Say yes here to support Microchip PIC32 GPIOs.
+config MVEBU_GPIO + bool "Marvell MVEBU GPIO driver" + depends on DM_GPIO && ARCH_MVEBU + default y + help + Say yes here to support Marvell MVEBU (Armada XP/38x) GPIOs. + endmenu diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 845a6d4..54d1706 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -47,3 +47,4 @@ obj-$(CONFIG_ZYNQ_GPIO) += zynq_gpio.o obj-$(CONFIG_VYBRID_GPIO) += vybrid_gpio.o obj-$(CONFIG_HIKEY_GPIO) += hi6220_gpio.o obj-$(CONFIG_PIC32_GPIO) += pic32_gpio.o +obj-$(CONFIG_MVEBU_GPIO) += mvebu_gpio.o diff --git a/drivers/gpio/mvebu_gpio.c b/drivers/gpio/mvebu_gpio.c new file mode 100644 index 0000000..9564ce2 --- /dev/null +++ b/drivers/gpio/mvebu_gpio.c @@ -0,0 +1,119 @@ +/* + * Copyright (C) 2016 Stefan Roese sr@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <errno.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define MVEBU_GPIOS_PER_BANK 32 + +struct mvebu_gpio_regs { + u32 data_out; + u32 io_conf; + u32 blink_en; + u32 in_pol; + u32 data_in; +}; + +struct mvebu_gpio_priv { + struct mvebu_gpio_regs *regs; + char name[2]; +}; + +static int mvebu_gpio_direction_input(struct udevice *dev, unsigned int gpio) +{ + struct mvebu_gpio_priv *priv = dev_get_priv(dev); + struct mvebu_gpio_regs *regs = priv->regs; + + setbits_le32(®s->io_conf, BIT(gpio)); + + return 0; +} + +static int mvebu_gpio_direction_output(struct udevice *dev, unsigned gpio, + int value) +{ + struct mvebu_gpio_priv *priv = dev_get_priv(dev); + struct mvebu_gpio_regs *regs = priv->regs; + + clrbits_le32(®s->io_conf, BIT(gpio)); + + return 0; +} + +static int mvebu_gpio_get_function(struct udevice *dev, unsigned gpio) +{ + struct mvebu_gpio_priv *priv = dev_get_priv(dev); + struct mvebu_gpio_regs *regs = priv->regs; + u32 val; + + val = readl(®s->io_conf) & BIT(gpio); + if (val) + return GPIOF_INPUT; + else + return GPIOF_OUTPUT; +} + +static int mvebu_gpio_set_value(struct udevice *dev, unsigned gpio, + int value) +{ + struct mvebu_gpio_priv *priv = dev_get_priv(dev); + struct mvebu_gpio_regs *regs = priv->regs; + + if (value) + setbits_le32(®s->data_out, BIT(gpio)); + else + clrbits_le32(®s->data_out, BIT(gpio)); + + return 0; +} + +static int mvebu_gpio_get_value(struct udevice *dev, unsigned gpio) +{ + struct mvebu_gpio_priv *priv = dev_get_priv(dev); + struct mvebu_gpio_regs *regs = priv->regs; + + return !!(readl(®s->data_in) & BIT(gpio)); +} + +static int mvebu_gpio_probe(struct udevice *dev) +{ + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct mvebu_gpio_priv *priv = dev_get_priv(dev); + + priv->regs = (struct mvebu_gpio_regs *)dev_get_addr(dev); + uc_priv->gpio_count = MVEBU_GPIOS_PER_BANK; + priv->name[0] = 'A' + dev->req_seq; + uc_priv->bank_name = priv->name; + + return 0; +} + +static const struct dm_gpio_ops mvebu_gpio_ops = { + .direction_input = mvebu_gpio_direction_input, + .direction_output = mvebu_gpio_direction_output, + .get_function = mvebu_gpio_get_function, + .get_value = mvebu_gpio_get_value, + .set_value = mvebu_gpio_set_value, +}; + +static const struct udevice_id mvebu_gpio_ids[] = { + { .compatible = "marvell,orion-gpio" }, + { } +}; + +U_BOOT_DRIVER(gpio_mvebu) = { + .name = "gpio_mvebu", + .id = UCLASS_GPIO, + .of_match = mvebu_gpio_ids, + .ops = &mvebu_gpio_ops, + .probe = mvebu_gpio_probe, + .priv_auto_alloc_size = sizeof(struct mvebu_gpio_priv), +};