Hi Tom,
Please pull this PR.
Summary: - Support Infineon S28HS02GT (Takahiro)
CI: - https://source.denx.de/u-boot/custodians/u-boot-spi/-/pipelines/19467
thanks, Jagan.
The following changes since commit 526a865fe4fea59fb2638726c26e39557eb97fdd:
Merge branch 'master-cleanup' of https://source.denx.de/u-boot/custodians/u-boot-sh (2024-01-27 20:43:20 -0500)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-spi master
for you to fetch changes up to 16dd10951015183f87b8202b8d4c8617da4f6d44:
mtd: spi-nor-ids: Add Infineon(Cypress) s28hs02gt ID (2024-01-29 19:34:17 +0530)
---------------------------------------------------------------- Maksim Kiselev (1): spi: dw: add check for Rx FIFO overflow
Ssunk (1): mtd: spi: spi-nor-ids: Add more XM25Q series chips
Takahiro Kuwano (9): mtd: spi-nor-core: Clean up macros for Infineon(Cypress) S25 and S28 mtd: spi-nor-core: Consolidate non-uniform erase helpers for S25 and S28 mtd: spi-nor-core: Rework spansion_read_any_reg() to support Octal DTR mode mtd: spi-nor-core: Use CLPEF(0x82) as alternative to CLSR(0x30) for S25 and S28 mtd: spi-nor-core: Rework s25_mdp_ready() to support Octal DTR mode mtd: spi-nor-core: Consolidate setup() hook for Infineon(Cypress) S25 and S28 mtd: spi-nor-core: Consolidate post_bfpt_fixup() for Infineon(Cypress) S25 and S28 mtd: spi-nor-core: Rework spi_nor_cypress_octal_dtr_enable() mtd: spi-nor-ids: Add Infineon(Cypress) s28hs02gt ID
Tejas Bhumkar (2): mtd: spi-nor-ids: Add is25lx512 chip spi: cadence_qspi: Address the comparison failure for 0-8 bytes of data
drivers/mtd/spi/spi-nor-core.c | 224 +++++++++++++++----------------------- drivers/mtd/spi/spi-nor-ids.c | 7 ++ drivers/spi/cadence_ospi_versal.c | 3 - drivers/spi/cadence_qspi.h | 4 + drivers/spi/cadence_qspi_apb.c | 3 + drivers/spi/designware_spi.c | 18 ++- include/linux/mtd/spi-nor.h | 14 +-- 7 files changed, 119 insertions(+), 154 deletions(-)