diff -urN u-boot/common/cmd_ide.c u-boot.automark/common/cmd_ide.c
--- u-boot/common/cmd_ide.c	2005-03-05 20:21:31.000000000 -0500
+++ u-boot.automark/common/cmd_ide.c	2005-04-01 13:38:48.000000000 -0500
@@ -799,6 +799,18 @@
 	EIEIO;
 	*((uchar *)(ATA_CURR_BASE(dev)+port)) = val;
 }
+#elif defined(CONFIG_IXP425)
+static void __inline__
+ide_outb(int dev, int port, unsigned char val)
+{
+	ulong p;
+	/* Ensure I/O operations complete */
+	p = (ulong)(ATA_CURR_BASE(dev)+port);
+	debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx [0x%08lx] -> 0x%08x\n",
+		dev, port, val, (ATA_CURR_BASE(dev)+port), p, val);
+	ixp425_pci_outb(p, val);
+}
+
 #else	/* ! __PPC__ */
 static void __inline__
 ide_outb(int dev, int port, unsigned char val)
@@ -820,6 +832,21 @@
 		dev, port, (ATA_CURR_BASE(dev)+port), val);
 	return (val);
 }
+#elif defined(CONFIG_IXP425)
+static unsigned char __inline__
+ide_inb(int dev, int port)
+{
+	ulong p;
+	uchar val;
+	/* Ensure I/O operations complete */
+	p = (ulong)(ATA_CURR_BASE(dev)+port);
+	debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx [0x%08lx] -> 0x%08x\n",
+		dev, port, (ATA_CURR_BASE(dev)+port), p, val);
+	val = ixp425_pci_inb(p);
+	return (val);
+}
+
+
 #else	/* ! __PPC__ */
 static unsigned char __inline__
 ide_inb(int dev, int port)
@@ -854,7 +881,7 @@
 /* But Au1x00 cpu:s already swaps data in big endian mode! */
 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_AU1X00)
 #define input_swap_data(x,y,z) input_data(x,y,z)
-#else
+#elif !defined(CONFIG_IXP425)
 static void
 input_swap_data(int dev, ulong *sect_buf, int words)
 {
@@ -922,6 +949,19 @@
 	}
 #endif
 }
+#elif defined(CONFIG_IXP425)
+static void
+output_data(int dev, ulong *sect_buf, int words)
+{
+	uchar	*dbuf = (uchar *)sect_buf;
+	while (words--) {
+		ide_outb(dev, ATA_DATA_EVEN, *(dbuf+0));
+		ide_outb(dev, ATA_DATA_ODD, *(dbuf+1));
+		ide_outb(dev, ATA_DATA_EVEN, *(dbuf+2));
+		ide_outb(dev, ATA_DATA_ODD, *(dbuf+3));
+		dbuf += 4;
+	}
+}
 #else	/* ! __PPC__ */
 static void
 output_data(int dev, ulong *sect_buf, int words)
@@ -973,6 +1013,31 @@
 	}
 #endif
 }
+#elif defined(CONFIG_IXP425)
+static void input_data(int dev, ulong *sect_buf, int words)
+{
+	uchar	*dbuf = (uchar *)sect_buf;
+	while (words--) {
+		*(dbuf+0) = ide_inb(dev, ATA_DATA_EVEN);
+		*(dbuf+1) = ide_inb(dev, ATA_DATA_ODD);
+		*(dbuf+2) = ide_inb(dev, ATA_DATA_EVEN);
+		*(dbuf+3) = ide_inb(dev, ATA_DATA_ODD);
+		dbuf += 4;
+	}
+}
+
+static void
+input_swap_data(int dev, ulong *sect_buf, int words)
+{
+	uchar	*dbuf = (uchar *)sect_buf;
+	while (words--) {
+		*(dbuf+1) = ide_inb(dev, ATA_DATA_EVEN);
+		*(dbuf+0) = ide_inb(dev, ATA_DATA_ODD);
+		*(dbuf+3) = ide_inb(dev, ATA_DATA_EVEN);
+		*(dbuf+2) = ide_inb(dev, ATA_DATA_ODD);
+		dbuf += 4;
+	}
+}
 #else	/* ! __PPC__ */
 static void
 input_data(int dev, ulong *sect_buf, int words)
diff -urN u-boot/common/cmd_pci.c u-boot.automark/common/cmd_pci.c
--- u-boot/common/cmd_pci.c	2005-03-20 17:33:47.000000000 -0500
+++ u-boot.automark/common/cmd_pci.c	2005-04-01 13:35:24.000000000 -0500
@@ -90,9 +90,15 @@
 
 			dev = PCI_BDF(BusNum, Device, Function);
 
+#ifndef CONFIG_IXP425
 			pci_read_config_word(dev, PCI_VENDOR_ID, &VendorID);
 			if ((VendorID == 0xFFFF) || (VendorID == 0x0000))
 				continue;
+#else
+			if (Device >= 4) break;
+
+			if (!pci_device_exists(dev)) continue;
+#endif
 
 			if (!Function) pci_read_config_byte(dev, PCI_HEADER_TYPE, &HeaderType);
 
@@ -107,8 +113,8 @@
 				       BusNum, Device, Function);
 				pci_header_show(dev);
 			}
-	    }
-    }
+		}
+	}
 }
 
 static char *pci_classes_str(u8 class)
diff -urN u-boot/cpu/ixp/cpu.c u-boot.automark/cpu/ixp/cpu.c
--- u-boot/cpu/ixp/cpu.c	2005-01-09 12:12:31.000000000 -0500
+++ u-boot.automark/cpu/ixp/cpu.c	2005-04-01 13:35:24.000000000 -0500
@@ -46,7 +46,8 @@
 	FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
 #endif
 
-	pci_init();
+	// do this later in lib_arm/board.c when things are more fully configured!
+	// pci_init(); 
 	return 0;
 }
 
diff -urN u-boot/cpu/ixp/pci.c u-boot.automark/cpu/ixp/pci.c
--- u-boot/cpu/ixp/pci.c	2005-01-11 19:15:16.000000000 -0500
+++ u-boot.automark/cpu/ixp/pci.c	2005-04-01 13:35:24.000000000 -0500
@@ -33,6 +33,8 @@
 #include <asm/arch/ixp425.h>
 #include <asm/arch/ixp425pci.h>
 
+#define dprintf(fmt,args...)
+
 static void non_prefetch_read (unsigned int addr, unsigned int cmd,
 			       unsigned int *data);
 static void non_prefetch_write (unsigned int addr, unsigned int cmd,
@@ -40,8 +42,8 @@
 static void configure_pins (void);
 static void sys_pci_gpio_clock_config (void);
 static void pci_bus_scan (void);
-static int pci_device_exists (unsigned int deviceNo);
-static void sys_pci_bar_info_get (unsigned int devnum, unsigned int bus,
+int pci_device_exists (unsigned int deviceNo);
+static void sys_pci_bar_info_get (pci_dev_t devnum, unsigned int bus,
 				  unsigned int dev, unsigned int func);
 static void sys_pci_device_bars_write (void);
 static void calc_bars (PciBar * Bars[], unsigned int nBars,
@@ -116,9 +118,12 @@
 
 	/*address bits 31:28 specify the device 10:8 specify the function */
 	/*Set the address to be read */
-	addr = BIT ((31 - dev)) | (where & ~3);
+	addr = BIT( 32 - PCI_DEV(dev) ) | (0x00000F00 & dev) | (where & ~0x03);
 	non_prefetch_read (addr, NP_CMD_CONFIGREAD, &retval);
 
+	dprintf("%s: addr: %#x, dev: %#x, where: %#x\n", __FUNCTION__, addr, dev, where);
+	dprintf("retval: %#x\n", retval);
+
 	*val = retval;
 
 	return (OK);
@@ -140,9 +145,12 @@
 	byteEnables = byteEnables << PCI_NP_CBE_BESL;
 	/*address bits 31:28 specify the device 10:8 specify the function */
 	/*Set the address to be read */
-	addr = BIT ((31 - dev)) | (where & ~3);
+	addr = BIT( 32 - PCI_DEV(dev) ) | (0x00000F00 & dev) | (where & ~0x03);
 	non_prefetch_read (addr, byteEnables | NP_CMD_CONFIGREAD, &retval);
 
+	dprintf("%s: addr: %#x, dev: %#x, where: %#x\n", __FUNCTION__, addr, dev, where);
+	dprintf("n: %#x, byteEnables: %#x, retval: %#x\n", n, byteEnables, retval);
+
 	/*Pick out the word we are interested in */
 	*val = (retval >> (8 * n));
 
@@ -164,8 +172,12 @@
 
 	/*address bits 31:28 specify the device, 10:8 specify the function */
 	/*Set the address to be read */
-	addr = BIT ((31 - dev)) | (where & ~3);
+	addr = BIT( 32 - PCI_DEV(dev) ) | (0x00000F00 & dev) | (where & ~0x03);
 	non_prefetch_read (addr, byteEnables | NP_CMD_CONFIGREAD, &retval);
+
+	dprintf("%s: addr: %#x, dev: %#x, where: %#x\n", __FUNCTION__, addr, dev, where);
+	dprintf("n: %#x, byteEnables: %#x, retval: %#x\n", n, byteEnables, retval);
+
 	/*Pick out the byte we are interested in */
 	*val = (retval >> (8 * n));
 
@@ -187,7 +199,7 @@
 	ldata = val << (8 * n);
 	/*address bits 31:28 specify the device 10:8 specify the function */
 	/*Set the address to be written */
-	addr = BIT ((31 - dev)) | (where & ~3);
+	addr = BIT( 32 - PCI_DEV(dev) ) | (0x00000F00 & dev) | (where & ~0x03);
 	non_prefetch_write (addr, byteEnables | NP_CMD_CONFIGWRITE, ldata);
 
 	return (OK);
@@ -210,7 +222,7 @@
 	ldata = val << (8 * n);
 	/*address bits 31:28 specify the device 10:8 specify the function */
 	/*Set the address to be written */
-	addr = BIT (31 - dev) | (where & ~3);
+	addr = BIT( 32 - PCI_DEV(dev) ) | (0x00000F00 & dev) | (where & ~0x03);
 	non_prefetch_write (addr, byteEnables | NP_CMD_CONFIGWRITE, ldata);
 
 	return (OK);
@@ -222,7 +234,8 @@
 
 	/*address bits 31:28 specify the device 10:8 specify the function */
 	/*Set the address to be written */
-	addr = BIT (31 - dev) | (where & ~3);
+
+	addr = BIT( 32 - PCI_DEV(dev) ) | (0x00000F00 & dev) | (where & ~0x03);
 	non_prefetch_write (addr, NP_CMD_CONFIGWRITE, val);
 
 	return (OK);
@@ -292,7 +305,8 @@
 			PCI_MEM_PHY, PCI_MEM_SIZE, PCI_REGION_MEM);
 	/* PCI I/O space */
 	pci_set_region (hose->regions + 2,
-			PCI_IO_BUS, PCI_IO_PHY, PCI_IO_SIZE, PCI_REGION_IO);
+			PCI_IO_BUS,
+			PCI_IO_PHY, PCI_IO_SIZE, PCI_REGION_IO);
 
 	hose->region_count = 3;
 
@@ -394,6 +408,7 @@
 	unsigned short data16;
 	unsigned int data32;
 	unsigned char intPin;
+	pci_dev_t device;
 
 	/* Assign first device to ourselves */
 	devices[0].bus = 0;
@@ -414,8 +429,10 @@
 
 	for (dev = 0; dev < IXP425_PCI_MAX_DEV; dev++) {
 
+		device = PCI_BDF(0, dev, 0);
+
 		/*Check whether a device is present */
-		if (pci_device_exists (dev) != TRUE) {
+		if (pci_device_exists (device) != TRUE) {
 
 			/*Clear error bits in ISR, write 1 to clear */
 			REG_WRITE (PCI_CSR_BASE, PCI_ISR_OFFSET, PCI_ISR_PSE
@@ -426,23 +443,23 @@
 
 		/*A device is present, add an entry to the array */
 		devices[nDevices].bus = bus;
-		devices[nDevices].device = dev;
+		devices[nDevices].device = device;
 		devices[nDevices].func = func;
 
-		pci_read_config_word (dev, PCI_CFG_VENDOR_ID, &data16);
+		pci_read_config_word (device, PCI_CFG_VENDOR_ID, &data16);
 
 		devices[nDevices].vendor_id = data16;
 
-		pci_read_config_word (dev, PCI_CFG_DEVICE_ID, &data16);
+		pci_read_config_word (device, PCI_CFG_DEVICE_ID, &data16);
 		devices[nDevices].device_id = data16;
 
 		/*The device is functioning correctly, set error to FALSE */
 		devices[nDevices].error = FALSE;
 
 		/*Figure out what BARs are on this device */
-		sys_pci_bar_info_get (nDevices, bus, dev, func);
+		sys_pci_bar_info_get (device, bus, dev, func);
 		/*Figure out what INTX# line the card uses */
-		pci_read_config_byte (dev, PCI_CFG_DEV_INT_PIN, &intPin);
+		pci_read_config_byte (device, PCI_CFG_DEV_INT_PIN, &intPin);
 
 		/*assign the appropriate irq line */
 		if (intPin > PCI_IRQ_LINES) {
@@ -453,7 +470,11 @@
 			devices[nDevices].irq = intPin;
 		}
 #ifdef CONFIG_PCI_SCAN_SHOW
-		printf ("%06d    %03d %03d %04d  %08d      %08x\n", nDevices,
+		printf ("%06d    %03d %03d %04d  %08x      %08x\n", nDevices-1,
+			devices[nDevices].bus,
+			devices[nDevices].device,
+			devices[nDevices].func,
+			devices[nDevices].device_id,
 			devices[nDevices].vendor_id);
 #endif
 		nDevices++;
@@ -467,7 +488,7 @@
 		   | PCI_ISR_PFE | PCI_ISR_PPE | PCI_ISR_AHBE);
 }
 
-void sys_pci_bar_info_get (unsigned int devnum,
+void sys_pci_bar_info_get (pci_dev_t devnum,
 			   unsigned int bus,
 			   unsigned int dev, unsigned int func)
 {
@@ -546,23 +567,21 @@
 void sys_pci_device_bars_write (void)
 {
 	unsigned int i;
-	int addr;
+	unsigned int device;
 
 	for (i = 1; i < nDevices; i++) {
 		if (devices[i].error) {
 			continue;
 		}
+		device = PCI_DEV(devices[i].device);
 
-		pci_write_config_dword (devices[i].device,
+		pci_write_config_dword (device,
 					PCI_CFG_BASE_ADDRESS_0,
 					devices[i].bar[0].address);
-		addr = (BIT (31 - devices[i].device) |
-			(0 << PCI_NP_AD_FUNCSL) |
-			(PCI_CFG_BASE_ADDRESS_0) ) & ~3;
-		pci_write_config_dword (devices[i].device,
+		pci_write_config_dword (device,
 					PCI_CFG_DEV_INT_LINE, devices[i].irq);
 
-		pci_write_config_word (devices[i].device,
+		pci_write_config_word (device,
 				       PCI_CFG_COMMAND, INITIAL_PCI_CMD);
 
 	}
@@ -593,24 +612,58 @@
 pci_dev_t pci_find_devices (struct pci_device_id * ids, int devNo)
 {
 	unsigned int i;
+	struct pci_device_id *id;
 	unsigned int devdidvid;
 	unsigned int didvid;
 	unsigned int vendorId, deviceId;
 
-	vendorId = ids->vendor;
-	deviceId = ids->device;
-	didvid = ((deviceId << 16) & IXP425_PCI_TOP_WORD_OF_LONG_MASK) |
-		(vendorId & IXP425_PCI_BOTTOM_WORD_OF_LONG_MASK);
+	unsigned short data16;
 
 	for (i = devNo + 1; i < nDevices; i++) {
-
+			
 		pci_read_config_dword (devices[i].device, PCI_CFG_VENDOR_ID,
 				       &devdidvid);
 
-		if (devdidvid == didvid) {
-			return devices[i].device;
+		dprintf("i: %d, device: %#x, devdidvd: %#x, didvid: %#x\n", i, devices[i].device, devdidvid, didvid);
+
+		pci_read_config_word (devices[i].device, PCI_CFG_VENDOR_ID, &data16);
+		dprintf("%#x ", data16);
+
+		pci_read_config_word (devices[i].device, PCI_CFG_DEVICE_ID, &data16);
+		dprintf("%#x\n", data16);
+
+
+		for (id = ids; id->vendor; id++) {
+			vendorId = id->vendor;
+			deviceId = id->device;
+			didvid = ((deviceId << 16) & IXP425_PCI_TOP_WORD_OF_LONG_MASK) |
+				(vendorId & IXP425_PCI_BOTTOM_WORD_OF_LONG_MASK);
+
+			if (devdidvid == didvid) {
+				return devices[i].device;
+			}
 		}
 	}
+
 	return -1;
 }
+
+u8 ixp425_pci_inb(u32 addr)
+{
+	u32 n, byte_enables, data;
+	n = addr % 4;
+	byte_enables = (0xf & ~BIT(n)) << PCI_NP_CBE_BESL;
+	non_prefetch_read(addr, byte_enables | NP_CMD_IOREAD, &data);
+
+	return data >> (8*n);
+}
+
+void ixp425_pci_outb(u32 addr, u8 value)
+{
+	u32 n, byte_enables, data;
+	n = addr % 4;
+	byte_enables = (0xf & ~BIT(n)) << PCI_NP_CBE_BESL;
+	data = value << (8*n);
+	non_prefetch_write(addr, byte_enables | NP_CMD_IOWRITE, data);
+}
 #endif	/* CONFIG_PCI */
diff -urN u-boot/cpu/ixp/start.S u-boot.automark/cpu/ixp/start.S
--- u-boot/cpu/ixp/start.S	2005-01-09 12:12:31.000000000 -0500
+++ u-boot.automark/cpu/ixp/start.S	2005-04-01 13:35:24.000000000 -0500
@@ -153,10 +153,61 @@
 	mcr	p15, 0, r0, c1, c0, 1
 	CPWAIT	r0
 
+#ifdef CFG_EXP_CS0
 	/* set EXP CS0 to the optimum timing */
 	ldr	r1, =CFG_EXP_CS0
 	ldr     r2, =IXP425_EXP_CS0
 	str     r1, [r2]
+#endif
+
+#ifdef CFG_EXP_CS1
+	/* set EXP CS1 to the optimum timing */
+	ldr	r1, =CFG_EXP_CS1
+	ldr     r2, =IXP425_EXP_CS1
+	str     r1, [r2]
+#endif
+
+#ifdef CFG_EXP_CS2
+	/* set EXP CS2 to the optimum timing */
+	ldr	r1, =CFG_EXP_CS2
+	ldr     r2, =IXP425_EXP_CS2
+	str     r1, [r2]
+#endif
+
+#ifdef CFG_EXP_CS3
+	/* set EXP CS3 to the optimum timing */
+	ldr	r1, =CFG_EXP_CS3
+	ldr     r2, =IXP425_EXP_CS3
+	str     r1, [r2]
+#endif
+
+#ifdef CFG_EXP_CS4
+	/* set EXP CS4 to the optimum timing */
+	ldr	r1, =CFG_EXP_CS4
+	ldr     r2, =IXP425_EXP_CS4
+	str     r1, [r2]
+#endif
+
+#ifdef CFG_EXP_CS5
+	/* set EXP CS5 to the optimum timing */
+	ldr	r1, =CFG_EXP_CS5
+	ldr     r2, =IXP425_EXP_CS5
+	str     r1, [r2]
+#endif
+
+#ifdef CFG_EXP_CS6
+	/* set EXP CS6 to the optimum timing */
+	ldr	r1, =CFG_EXP_CS6
+	ldr     r2, =IXP425_EXP_CS6
+	str     r1, [r2]
+#endif
+
+#ifdef CFG_EXP_CS7
+	/* set EXP CS7 to the optimum timing */
+	ldr	r1, =CFG_EXP_CS7
+	ldr     r2, =IXP425_EXP_CS7
+	str     r1, [r2]
+#endif
 
 	/* make sure flash is visible at 0 */
 #if 0
diff -urN u-boot/include/asm-arm/arch-ixp/ixp425pci.h u-boot.automark/include/asm-arm/arch-ixp/ixp425pci.h
--- u-boot/include/asm-arm/arch-ixp/ixp425pci.h	2005-01-09 12:12:34.000000000 -0500
+++ u-boot.automark/include/asm-arm/arch-ixp/ixp425pci.h	2005-04-01 13:35:24.000000000 -0500
@@ -153,7 +153,7 @@
 /*define the default setting of the AHB memory base reg*/
 #define IXP425_PCI_AHBMEMBASE_DEFAULT 0x00010203
 #define IXP425_PCI_AHBIOBASE_DEFAULT  0x0
-#define IXP425_PCI_PCIMEMBASE_DEFAULT 0x0
+#define IXP425_PCI_PCIMEMBASE_DEFAULT 0x48494a4b
 
 /*define the default settings for the controller's BARs*/
 #ifdef IXP425_PCI_SIMPLE_MAPPING
diff -urN u-boot/include/pci.h u-boot.automark/include/pci.h
--- u-boot/include/pci.h	2003-05-31 14:35:28.000000000 -0400
+++ u-boot.automark/include/pci.h	2005-04-01 13:35:24.000000000 -0500
@@ -298,7 +298,7 @@
 #define PCI_REGION_MEMORY	0x00000100	/* System memory */
 #define PCI_REGION_RO		0x00000200	/* Read-only memory */
 
-extern __inline__ void pci_set_region(struct pci_region *reg,
+static __inline__ void pci_set_region(struct pci_region *reg,
 				      unsigned long bus_start,
 				      unsigned long phys_start,
 				      unsigned long size,
diff -urN u-boot/lib_arm/board.c u-boot.automark/lib_arm/board.c
--- u-boot/lib_arm/board.c	2005-01-09 12:12:35.000000000 -0500
+++ u-boot.automark/lib_arm/board.c	2005-04-01 13:35:24.000000000 -0500
@@ -303,6 +303,13 @@
 		}
 	}
 
+#if defined(CONFIG_PCI)
+	/*
+	 * Do pci configuration
+	 */
+	pci_init();
+#endif
+
 	devices_init ();	/* get the devices list going. */
 
 	jumptable_init ();
