Accept a bloblist and control devicetree from a previous phase in registers r0 and r1
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v2: - Use three registers instead of two for the entry
arch/arm/cpu/armv7/start.S | 7 ++++++- arch/arm/lib/crt0.S | 5 +++++ 2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 698e15b8e18..494f4abdb1f 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -36,6 +36,11 @@ #endif
reset: + # Keep passage information in case it is provided + mov r6, r1 + mov r7, r2 + mov r8, r3 + /* Allow the board to save important registers */ b save_boot_params save_boot_params_ret: @@ -124,7 +129,7 @@ switch_to_hypervisor_ret: bl cpu_init_crit #endif #endif - + # Note: r6-r8 are available to _main in case standard passage is used bl _main
/*------------------------------------------------------------------------------*/ diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index ba312901f33..68282ebfd02 100644 --- a/arch/arm/lib/crt0.S +++ b/arch/arm/lib/crt0.S @@ -117,6 +117,11 @@ ENTRY(_main) CLEAR_BSS #endif
+#if CONFIG_IS_ENABLED(PASSAGE_IN) + str r6, [r9, #GD_PASSAGE_MACH] + str r7, [r9, #GD_PASSAGE_DTB] + str r8, [r9, #GD_PASSAGE_BLOBLIST] +#endif mov r0, #0 bl board_init_f