On Tue, 2013-11-19 at 13:21 +0000, Gupta, Pekon wrote:
From: Scott Wood [mailto:scottwood@freescale.com]
On Tue, Sep 10, 2013 at 12:55:07PM +0530, pekon gupta wrote: With increase in NAND flash densities occurence of bit-flips has increased. Thus stronger ECC schemes are required for detecting and correcting
multiple
simultaneous bit-flips in same NAND page. But stronger ECC schemes have
large
ECC syndrome which require more space in OOB/Spare. This patch add support for BCH16_ECC: (a) BCH16_ECC can correct 16 bit-flips per 512Bytes of data. (b) BCH16_ECC generates 26-bytes of ECC syndrome / 512B.
Due to (b) this scheme can only be used with NAND devices which have
enough
OOB to satisfy following equation: OOBsize per page >= 26 * (page-size / 512)
Signed-off-by: Pekon Gupta pekon@ti.com
arch/arm/include/asm/arch-am33xx/cpu.h | 15 ++++- arch/arm/include/asm/arch-am33xx/omap_gpmc.h | 4 +- drivers/mtd/nand/omap_gpmc.c | 87
+++++++++++++++++++++++-----
include/mtd/mtd-abi.h | 3 +- 4 files changed, 90 insertions(+), 19 deletions(-)
This doesn't apply cleanly.
This one is on top of previous patch series like.. [Part 1] http://lists.denx.de/pipermail/u-boot/2013-November/167393.html [Part 2] http://lists.denx.de/pipermail/u-boot/2013-November/167445.html
So once the above series are cleaned and accepted. I'll rebase and re-send this series for BCH16 ecc-scheme again..
Please be sure to mention such dependencies in the future.
-Scott