
17 Jun
2022
17 Jun
'22
11:01 a.m.
Hi,
On 5/6/22 16:06, Patrick Delaunay wrote:
Add support for new compatible "st,stm32mp13-ddr" to manage the DDR sub system (Controller and PHY) in STM32MP13x SOC:
- only one AXI port
- support of 16 port output (MEMC_DRAM_DATA_WIDTH = 2)
The STM32MP15x SOC have 2 AXI ports and 32 bits support.
Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com
.../memory-controllers/st,stm32mp1-ddr.txt | 49 +++++++++++++++---- drivers/ram/stm32mp1/stm32mp1_ram.c | 28 +++++++---- 2 files changed, 57 insertions(+), 20 deletions(-)
Applied to u-boot-stm/next, thanks!
Regards Patrick