-----Ursprüngliche Nachricht----- Von: Michal Simek [mailto:michal.simek@xilinx.com]
On 17.2.2017 10:21, Michal Simek wrote:
On 17.2.2017 08:33, Stefan.Herbrechtsmeier@weidmueller.com wrote:
Hi Michal,
-----Ursprüngliche Nachricht----- Von: Michal Simek [mailto:michal.simek@xilinx.com]
Hi Stefan,
On 6.2.2017 11:14, Stefan.Herbrechtsmeier@weidmueller.com wrote:
Hi Michal,
-----Ursprüngliche Nachricht----- Von: stefan.herbrechtsmeier@weidmueller.com
The old platform clock driver use a dynamic array which is filled at every boot with static clock tree information and unused clock
rates.
This needs much memory and complicates the strip down for the
SPL.
The new clock framework driver contains the tree information in functions and reads clock rates on demand.
Any comments on this patch series?
I was sick the whole last week and catching emails. I have tried it on zc702 and it didn't work for me that's why I
will
have closer look hopefully this week. Definitely sorry for delay.
Could you describe the problem. Maybe I could help.
On zybo I am getting this.
failed to get clock failed to get clock No serial driver found
Interesting. I have rebased trees and it started to work on zybo/zc702/zc706/microzed.
I assume a SPL malloc problem because of the additional "u-boot,dm-pre-reloc" entries inside the device tree.
Maybe we need to increase the CONFIG_SYS_SPL_MALLOC_SIZE.
Regards, Stefan
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