Hi Quentin,
Thanks for looking into this!
Le Fri 27 Sep 24, 11:25, Quentin Schulz a écrit :
I'm not entirely sure on whose side the issue is, but I didn't receive your mails, either from the U-Boot mailing list or directly from the Cc field. I however could find the patch on lore.kernel.org... and I also received yours and Dragan's exchange on patch 4 (but not the patch itself). Any chance you received something from my mail server? Does anyone in Cc of this mail actually received the mail?
No automatic reply from your mail server and the logs look good on my side, with a 250 result on all sent patches. Strange indeed...
diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi index aecf7dbe383c..883d399a06a3 100644 --- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi +++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi @@ -7,6 +7,10 @@ #include "rk3399-sdram-lpddr4-100.dtsi" / {
- config {
sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;I think this is the wrong pin to use.
The routing of GPIO1_A6 is similar on RK3399 Puma and Pine64 RockPro64, but it differs massively for the Firefly Roc PC.
However, a similar routing is done for GPIO1_A5 on the Firefly, I believe that one is more appropriate. What do you think?
I just double-checked the schematics (ROC_3399_PC), looking at signal OTP_OUT_H which is definitely connected to GPIO1_A6 (P26).
Also it clearly resets the board when toggled and solves the MMC reset issue I was having on this exact board, so I'm rather confident that it's the right one to use :)
Cheers,
Paul