The DesignWare-like DRAM controllers in Allwinner chips have DDR2 DRAM support, add support for it in the driver.
No real DDR2 chip info is added in this commit.
Signed-off-by: Icenowy Zheng icenowy@aosc.xyz --- arch/arm/mach-sunxi/dram_sunxi_dw.c | 2 ++ board/sunxi/Kconfig | 3 +++ 2 files changed, 5 insertions(+)
diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c index 401f6a4624..e9dafb0527 100644 --- a/arch/arm/mach-sunxi/dram_sunxi_dw.c +++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c @@ -261,6 +261,8 @@ static void mctl_set_cr(struct dram_para *para) writel(MCTL_CR_BL8 | MCTL_CR_2T | MCTL_CR_INTERLEAVED | #if defined CONFIG_SUNXI_DRAM_DDR3 MCTL_CR_DDR3 | +#elif defined CONFIG_SUNXI_DRAM_DDR2 + MCTL_CR_DDR2 | #else #error Unsupported DRAM type! #endif diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 7e03ee8b36..b785de7f0e 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -196,6 +196,9 @@ if SUNXI_DRAM_DW config SUNXI_DRAM_DDR3 bool
+config SUNXI_DRAM_DDR2 + bool + choice prompt "DRAM Type and Timing" default SUNXI_DRAM_DDR3_1333