Hi Anton,
On 15.07.2015 11:12, Anton Schubert wrote:
The mv78260 needs atleast 10ms after setting the ddr3 training patterns
s/atleast/at least
or else the cpu will hang.
Is this documented somewhere? Or just a value from your experiments / tests?
This patch increases said delay to 20ms just to be safe.
Signed-off-by: Anton Schubert anton.schubert@gmx.de Cc: Stefan Roese sr@denx.de Cc: Luka Perkov luka.perkov@sartura.hr
In general I'm fine with this patch. But I noticed that this patch breaks booting on my AXP board. I then remembered another issue I has with timer functions in SPL on MVEBU (A38x). The timer functionality is not enabled at all at this early boot time. I'll send another patch shortly. Please give it a try and let me know if this works. And if you still need this delay increasing patch here.
Thank, Stefan