Re: [U-Boot] [PATCH 3/6] riscv: ae350: add imply v5l2 cache controller

Hi Rick,

On Tue, May 28, 2019 at 5:44 PM Andes uboot@andestech.com wrote:

From: Rick Chen rick@andestech.com

Select the v5l2 UCLASS_CACHE driver for AE350.

Signed-off-by: Rick Chen rick@andestech.com Cc: Greentime Hu greentime@andestech.com

---

board/AndesTech/ax25-ae350/Kconfig | 1 + 1 file changed, 1 insertion(+)

diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ax25-ae350/Kconfig index 5e682b6..dd299d9 100644 --- a/board/AndesTech/ax25-ae350/Kconfig +++ b/board/AndesTech/ax25-ae350/Kconfig @@ -25,5 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select RISCV_NDS imply SMP

•   imply V5L2_CACHE
  

I believe L2 cache is a CPU specific feature, hence this should be implied from arch/riscv/cpu/ax25/Kconfig

Regards, Bin