This is not only a cosmetic change as it fixes the real bug of board reset not working with the ELDK 4.2 toolchain.
Signed-off-by: Detlev Zundel dzu@denx.de --- cpu/mpc512x/cpu.c | 15 ++++++++------- cpu/mpc512x/diu.c | 8 ++++---- cpu/mpc512x/pci.c | 6 +++--- cpu/mpc512x/serial.c | 8 ++++---- 4 files changed, 19 insertions(+), 18 deletions(-)
diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c index dac48db..f96a4c8 100644 --- a/cpu/mpc512x/cpu.c +++ b/cpu/mpc512x/cpu.c @@ -1,6 +1,6 @@ /* + * (C) Copyright 2007-2010 DENX Software Engineering * Copyright (C) 2004-2006 Freescale Semiconductor, Inc. - * (C) Copyright 2007 DENX Software Engineering * * See file CREDITS for list of people who contributed to this * project. @@ -32,6 +32,7 @@ #include <net.h> #include <netdev.h> #include <asm/processor.h> +#include <asm/io.h>
#if defined(CONFIG_OF_LIBFDT) #include <fdt_support.h> @@ -44,7 +45,7 @@ int checkcpu (void) volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; ulong clock = gd->cpu_clk; u32 pvr = get_pvr (); - u32 spridr = immr->sysconf.spridr; + u32 spridr = in_be32(&immr->sysconf.spridr); char buf1[32], buf2[32];
puts ("CPU: "); @@ -87,17 +88,17 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) /* * Enable Reset Control Reg - "RSTE" is the magic word that let us go */ - immap->reset.rpr = 0x52535445; + out_be32(&immap->reset.rpr, 0x52535445);
/* Verify Reset Control Reg is enabled */ - while (!((immap->reset.rcer) & RCER_CRE)) + while (!(in_be32(&immap->reset.rcer) & RCER_CRE)) ;
printf ("Resetting the board.\n"); udelay(200);
/* Perform reset */ - immap->reset.rcr = RCR_SWHR; + out_be32(&immap->reset.rcr, RCR_SWHR);
/* Unreached... */ return 1; @@ -124,8 +125,8 @@ void watchdog_reset (void)
/* Reset watchdog */ volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; - immr->wdt.swsrr = 0x556c; - immr->wdt.swsrr = 0xaa39; + out_be32(&immr->wdt.swsrr, 0x556c); + out_be32(&immr->wdt.swsrr, 0xaa39);
if (re_enable) enable_interrupts (); diff --git a/cpu/mpc512x/diu.c b/cpu/mpc512x/diu.c index 691451a..a24f395 100644 --- a/cpu/mpc512x/diu.c +++ b/cpu/mpc512x/diu.c @@ -57,10 +57,10 @@ void diu_set_pixel_clock(unsigned int pixclock) debug("DIU pixval = %lu\n", pixval);
/* Modify PXCLK in GUTS CLKDVDR */ - debug("DIU: Current value of CLKDVDR = 0x%08x\n", *clkdvdr); - temp = *clkdvdr & 0xFFFFFF00; - *clkdvdr = temp | (pixval & 0xFF); - debug("DIU: Modified value of CLKDVDR = 0x%08x\n", *clkdvdr); + debug("DIU: Current value of CLKDVDR = 0x%08x\n", in_be32(clkdvdr)); + temp = in_be32(clkdvdr) & 0xFFFFFF00; + out_be32(clkdvdr, temp | (pixval & 0xFF)); + debug("DIU: Modified value of CLKDVDR = 0x%08x\n", in_be32(clkdvdr)); }
char *valid_bmp(char *addr) diff --git a/cpu/mpc512x/pci.c b/cpu/mpc512x/pci.c index bbfab3e..141db8b 100644 --- a/cpu/mpc512x/pci.c +++ b/cpu/mpc512x/pci.c @@ -1,6 +1,6 @@ /* + * Copyright (C) 2009-2010 DENX Software Engineering wd@denx.de * Copyright (C) Freescale Semiconductor, Inc. 2006, 2007. - * Copyright (C) 2009 DENX Software Engineering wd@denx.de * * See file CREDITS for list of people who contributed to this * project. @@ -60,10 +60,10 @@ pci_init_board(void) struct pci_controller *hose;
/* Set PCI divider for 33MHz */ - reg32 = im->clk.scfr[0]; + reg32 = in_be32(&im->clk.scfr[0]); reg32 &= ~(SCFR1_PCI_DIV_MASK); reg32 |= SCFR1_PCI_DIV << SCFR1_PCI_DIV_SHIFT; - im->clk.scfr[0] = reg32; + out_be32(&im->clk.scfr[0], reg32);
clrsetbits_be32(&im->clk.scfr[0], SCFR1_PCI_DIV_MASK, diff --git a/cpu/mpc512x/serial.c b/cpu/mpc512x/serial.c index 4fc4693..ec2f41b 100644 --- a/cpu/mpc512x/serial.c +++ b/cpu/mpc512x/serial.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2000 - 2009 + * (C) Copyright 2000 - 2010 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -125,7 +125,7 @@ void serial_putc (const char c) while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP)) ;
- psc->tfdata_8 = c; + out_8(&psc->tfdata_8, c); }
void serial_putc_raw (const char c) @@ -137,7 +137,7 @@ void serial_putc_raw (const char c) while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP)) ;
- psc->tfdata_8 = c; + out_8(&psc->tfdata_8, c); }
@@ -157,7 +157,7 @@ int serial_getc (void) while (in_be32(&psc->rfstat) & PSC_FIFO_EMPTY) ;
- return psc->rfdata_8; + return in_8(&psc->rfdata_8); }
int serial_tstc (void)