
22 Apr
2023
22 Apr
'23
8:19 p.m.
Add dummy support for the CLK_PCIEPHY2_REF clock.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- drivers/clk/rockchip/clk_rk3568.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index cefc263971a6..c8e688789e4c 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -427,6 +427,7 @@ static ulong rk3568_pmuclk_set_rate(struct clk *clk, ulong rate) break; case CLK_PCIEPHY0_REF: case CLK_PCIEPHY1_REF: + case CLK_PCIEPHY2_REF: return 0; default: return -ENOENT;
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2.40.0