I do not see a good reason to do this by a CONFIG option that affects all SoCs. The ram_size can be adjusted by dram_init() at run-time.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com ---
arch/arm/mach-uniphier/dram_init.c | 7 +++++++ include/configs/uniphier.h | 2 -- 2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index cb35dab..f678114 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -238,6 +238,13 @@ int dram_init(void) gd->ram_size += dram_map[i].size; }
+ /* + * LD20 uses the last 64 byte for each channel for dynamic + * DDR PHY training + */ + if (uniphier_get_soc_id() == UNIPHIER_LD20_ID) + gd->ram_size -= 64; + return 0; }
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 12cbe9b..5ab06f6 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -215,8 +215,6 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_NR_DRAM_BANKS 3 -/* for LD20; the last 64 byte is used for dynamic DDR PHY training */ -#define CONFIG_SYS_MEM_TOP_HIDE 64
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE)